Low power and high efficiency voltage-to-current converter with improved power supply rejection

• US 7,239,184 B2
• Filed: 04/27/2005
• Issued: 07/03/2007
• Est. Priority Date: 04/27/2005
• Status: Active Grant

• Current Assignee: National Instruments Corporation (Emerson Electric Company)
• Original Assignee: National Instruments Corporation (Emerson Electric Company)
• Inventors: Whittington, Mark, Cetrulo, Raffaele
• Primary Examiner(s): Wells; Kenneth B.
• Application Number:
  US11/116,026
• Publication Number:
  US 20060244494A1
• Time in Patent Office: 797 Days
• Field of Search: 327/103, 327/320, 327/324
• US Class Current: 327/103
• CPC Class Codes: G05F 1/561 Voltage to current converters amplifiers H03F
• CPC Class Codes: H03F 1/523 for amplifiers using field-effect devices H03F1/526 takes precedence

Abstract

A low power and high efficiency voltage-to-current (V/I) converter designed with few parts and having improved power supply rejection. The V/I converter may include an op-amp, a MOSFET, and a first and second voltage dividers. The first voltage divider circuit may include a first, second, third, and fourth resistors. A source terminal of the MOSFET may be connected to a junction of the third and fourth resistors and the fourth resistor may be connected to a positive supply rail. Also, an inverting input terminal of the op-amp may be coupled to a junction of the second and third resistors. Additionally, the second resistor may be coupled to the first resistor, which may be connected to an input terminal of the V/I converter. The V/I converter typically has very good DC rejection of the power supply because the first and second voltage dividers are designed to have the same ratios.

Claims

1. A voltage-to-current (V/I) converter comprising:

a positive supply rail;

an input terminal operable to receive a control voltage;

an output terminal operable to provide an output current corresponding to the control voltage;

an op-amp including an inverting input terminal, a non-inverting input terminal, and an output terminal;

a transistor including a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal is coupled to the output terminal of the op-amp;

a first voltage divider circuit including a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein the source terminal of the transistor is coupled to a junction of the third and fourth resistors, wherein the fourth resistor is also coupled to the positive supply rail, wherein the inverting input terminal of the op-amp is coupled to a junction of the second and third resistors, and wherein the second resistor is coupled to the first resistor and the first resistor is coupled to the input terminal of the V/I converter; and

a protection circuit coupled to the transistor to prevent over-voltage and over-current conditions, the protection circuit including;

a first diode coupled between the drain terminal of the transistor and the output terminal of the V/I converter;

a second diode coupled to a junction of the drain terminal of the transistor and the first diode, wherein the second diode is also coupled to a fifth resistor;

a first bipolar junction transistor (BJT) including a base terminal, an emitter terminal, and a collector terminal, wherein the emitter terminal of the first BJT is coupled to the fifth resistor and the base terminal of the first BJT is coupled to ground, wherein the collector terminal of the first BJT is coupled to a junction of the positive supply rail and a sixth resistor; and

a second BJT including a base terminal, an emitter terminal, and a collector terminal, wherein the base terminal of the second BJT is coupled to the sixth resistor and the emitter terminal of the second BJT is coupled to the positive supply rail, wherein the collector terminal of the second BJT is coupled to the gate terminal of the transistor.

2. The V/I converter of claim 1, wherein the transistor is a metal-oxide semiconductor field-effect transistor (MOSFET).

3. The V/I converter of claim 1, further comprising a second voltage divider circuit coupled to the positive supply rail and the non-inverting input terminal of the op-amp, wherein the second voltage divider circuit includes a seventh resistor and an eighth resistor, wherein the non-inverting input terminal of the op-amp is coupled to a junction of the seventh and eighth resistors, and wherein the seventh resistor is also coupled to the positive supply rail and the eighth resistor is also coupled to ground.

4. The V/I converter of claim 3, wherein a ratio corresponding to the second voltage divider circuit, which is equal to a resistance value of the seventh resistor divided by a resistance value of the eighth resistor, is equal to a ratio corresponding to the first voltage divider circuit, which is equal to a resistance value of the third resistor plus a resistance value of the fourth resistor divided by a resistance value of the first resistor plus a resistance value of the second resistor.

5. The V/I converter of claim 4, wherein the ratio corresponding to the second voltage divider circuit is equal to the ratio corresponding to the first voltage divider circuit to improve power supply rejection.

6. The V/I converter of claim 4, wherein if the first resistor is R1, the second resistor is R2, the third resistor is R3, the fourth resistor is R4, the seventh resistor is R7, the eighth resistor is R8, the control voltage is V₁, the positive supply rail is V_S, and the output current is I_O, a transfer function of the V/I converter is the following:

$I_O<br><br>\left(V_1,V_S\right)\approx <br><br>\frac{R<br><br><br><br>3}{R<br><br><br><br>2+R<br><br><br><br>1}*\frac{V<br><br><br><br>1}{R<br><br><br><br>4}+\frac{V<br><br><br><br>1}{R<br><br><br><br>2+R<br><br><br><br>1}+V_S*\left[\frac{1}{R<br><br><br><br>4}<br><br>\left[1-\left(1+\frac{R<br><br><br><br>3}{R<br><br><br><br>2+R<br><br><br><br>1}+\frac{R<br><br><br><br>4}{R<br><br><br><br>2+R<br><br><br><br>1}\right)*\frac{R<br><br><br><br>6}{R<br><br><br><br>6+R<br><br><br><br>5}\right]\right]$

7. The V/I converter of claim 6, wherein if the ratio corresponding to the second voltage divider circuit is equal to the ratio corresponding to the first voltage divider circuit, the output current (I_O) is independent of the positive supply rail (V_S) and the transfer function of the V/I converter simplifies to the following:

$I_O<br><br>\left(V_1\right)\approx <br><br>\frac{R<br><br><br><br>3}{R<br><br><br><br>2+R<br><br><br><br>1}*\frac{V<br><br><br><br>1}{R<br><br><br><br>4}+\frac{V<br><br><br><br>1}{R<br><br><br><br>2+R<br><br><br><br>1}$

8. The V/I converter of claim 7, wherein a ratio corresponding to the resistance value of the fourth resistor divided by the resistance value of the first resistor is equal to a ratio corresponding to the resistance value of the third resistor divided by the resistance value of the second resistor, which is also equal to the ratio corresponding to the resistance value of the seventh resistor divided by the resistance value of the eighth resistor.

9. The V/I converter of claim 3, further comprising a ninth resistor coupled between the positive supply rail and the gate terminal of the transistor.

10. The V/I converter of claim 1, wherein a common mode voltage of the op-amp is constant which reduces non-linearity errors.

11. The V/I converter of claim 1, wherein the fourth resistor is a sense resistor, and the V/I converter is operable to reflect the control voltage across the sense resistor to generate a current to be provided to the transistor.

12. A measurement device comprising:

one or more digital-to-analog converters (DACs) operable to convert received digital data into analog data;

a voltage-to-current (V/I) converter coupled to the one or more DACs, the V/I converter comprising;

a positive supply rail;

an input terminal operable to receive a control voltage;

an output terminal operable to provide an output current corresponding to the control voltage;

an op-amp including an inverting input terminal, a non-inverting input terminal, and an output terminal;

a transistor including a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal is coupled to the output terminal of the op-amp and the drain terminal is coupled to the output terminal of the V/I converter; and

a first voltage divider circuit including a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein the source terminal of the transistor is coupled to a junction of the third and fourth resistors, wherein the fourth resistor is also coupled to the positive supply rail, wherein the inverting input terminal of the op-amp is coupled to a junction of the second and third resistors, and wherein the second resistor is coupled to the first resistor and the first resistor is coupled to the input terminal of the V/I converter;

a protection circuit coupled to the V/I converter to prevent over-voltage and over-current conditions, wherein the protection circuit comprises;

a first diode coupled between the drain terminal of the transistor and an output terminal of the protection circuit;

a second diode coupled to a junction of the drain terminal of the transistor and the first diode, wherein the second diode is also coupled to an fifth resistor;

a first bipolar junction transistor (BJT) including a base terminal, an emitter terminal, and a collector terminal, wherein the emitter terminal of the first BJT is coupled to the fifth resistor and the base terminal of the first BJT is coupled to ground, wherein the collector terminal of the first BJT is coupled to a junction of the positive supply rail and a sixth resistor; and

a second BJT including a base terminal, an emitter terminal, and a collector terminal, wherein the base terminal of the second BJT is coupled to the sixth resistor and the emitter terminal of the second BJT is coupled to the positive supply rail, wherein the collector terminal of the second BJT is coupled to the gate terminal of the transistor.

13. The measurement device of claim 12, wherein the transistor is a metal-oxide semiconductor field-effect transistor (MOSFET).

14. The measurement device of claim 12, further comprising a second voltage divider circuit coupled to the positive supply rail and the non-inverting input terminal of the op-amp, wherein the second voltage divider circuit includes a seventh resistor and an eighth resistor, wherein the non-inverting input terminal of the op-amp is coupled to a junction of the seventh and eighth resistors, and wherein the seventh resistor is also coupled to the positive supply rail and the eighth resistor is also coupled to ground.

15. The measurement device of claim 14, wherein a ratio corresponding to the second voltage divider circuit, which is equal to a resistance value of the seventh resistor divided by a resistance value of the eighth resistor, is equal to a ratio corresponding to the first voltage divider circuit, which is equal to a resistance value of the third resistor plus a resistance value of the fourth resistor divided by a resistance value of the first resistor plus a resistance value of the second resistor.

16. The measurement device of claim 15, wherein the ratio corresponding to the second voltage divider circuit is equal to the ratio corresponding to the first voltage divider circuit to improve power supply rejection.

17. The measurement device of claim 15, wherein if the first resistor is R1, the second resistor is R2, the third resistor is R3, the fourth resistor is R4, the seventh resistor is R7, the eighth resistor is R8, the control voltage is V₁, the positive supply rail is V_S, and the output current is I_O, a transfer function of the V/I converter is the following:

$I_O<br><br>\left(V_1,V_S\right)\approx <br><br>\frac{\mathrm{R3}}{\mathrm{R2}+\mathrm{R1}}*\frac{\mathrm{V1}}{\mathrm{R4}}+\frac{\mathrm{V1}}{\mathrm{R2}+\mathrm{R1}}+V_S*\left[\frac{1}{\mathrm{R4}}<br><br>\left[1-\left(1+\frac{\mathrm{R3}}{\mathrm{R2}+\mathrm{R1}}+\frac{\mathrm{R4}}{\mathrm{R2}+\mathrm{R1}}\right)*\frac{\mathrm{R6}}{\mathrm{R6}+\mathrm{R5}}\right]\right].$

18. The measurement device of claim 17, wherein if the ratio corresponding to the second voltage divider circuit is equal to the ratio corresponding to the first voltage divider circuit, the output current (I_O) is independent of the positive supply rail (V_S) and the transfer function of the V/I converter simplifies to the following:

$I_O<br><br>\left(V_1\right)\approx <br><br>\frac{\mathrm{R3}}{\mathrm{R2}+\mathrm{R1}}*\frac{\mathrm{V1}}{\mathrm{R4}}+\frac{\mathrm{V1}}{\mathrm{R2}+\mathrm{R1}}.$

19. The measurement device of claim 18, wherein a ratio corresponding to the resistance value of the fourth resistor divided by the resistance value of the first resistor is equal to a ratio corresponding to the resistance value of the third resistor divided by the resistance value of the second resistor, which is also equal to the ratio corresponding to the resistance value of the seventh resistor divided by the resistance value of the eighth resistor.

20. The measurement device of claim 14, further comprising a ninth resistor coupled between the positive supply rail and the gate terminal of the transistor.

21. The measurement device of claim 12, wherein a common mode voltage of the op-amp is constant which reduces non-linearity errors.

22. The measurement device of claim 12, wherein the fourth resistor is a sense resistor, wherein the V/I converter is operable to reflect the control voltage across the sense resistor to generate a current to be provided to the transistor.

23. The measurement device of claim 12, wherein the first diode is a Schottky diode and the second diode is a pn-junction diode.

24. The measurement device of claim 12, comprised in a measurement system including a computer system and a unit under test (UUT), wherein the measurement device is operable to receive a digital signal from the computer system and to provide an analog signal to the UUT to stimulate the UUT.

25. A voltage-to-current (V/I) converter comprising:

a positive supply rail;

an input terminal operable to receive a control voltage;

an output terminal operable to provide an output current corresponding to the control voltage;

an op-amp including an inverting input terminal, a non-inverting input terminal, and an output terminal;

a metal-oxide semiconductor field-effect transistor (MOSFET) including a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal is coupled to the output terminal of the op-amp;

a first voltage divider circuit including a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein the source terminal of the MOSFET is coupled to a junction of the third and fourth resistors, wherein the fourth resistor is also coupled to the positive supply rail, wherein the inverting input terminal of the op-amp is coupled to a junction of the second and third resistors, and wherein the second resistor is coupled to the first resistor and the first resistor is coupled to the input terminal of the V/I converter;

a second voltage divider circuit including a fifth resistor and a sixth resistor, wherein the non-inverting input terminal of the op-amp is coupled to a junction of the fifth and sixth resistors, and wherein the fifth resistor is also coupled to the positive supply rail and the sixth resistor is also coupled to ground; and

a protection circuit coupled to the MOSFET to prevent over-voltage and over-current conditions, the protection circuit including;

a Schottky diode coupled between the drain terminal of the MOSFET and the output terminal of the V/I converter;

a pn-junction diode coupled to a junction of the drain terminal of the MOSFET and the Schottky diode, wherein the pn-junction diode is also coupled to a seventh resistor;

a first bipolar junction transistor (BJT) including a base terminal, an emitter terminal, and a collector terminal, wherein the emitter terminal of the first BJT is coupled to the seventh resistor and the base terminal of the first BJT is coupled to ground, wherein the collector terminal of the first BJT is coupled to a junction of the positive supply rail and an eighth resistor; and

a second BJT including a base terminal, an emitter terminal, and a collector terminal, wherein the base terminal of the second BJT is coupled to the eighth resistor and the emitter terminal of the second BJT is coupled to the positive supply rail, wherein the collector terminal of the second BJT is coupled to the gate terminal of the transistor.

26. A measurement device comprising:

a voltage-to-current converter including;

a positive supply rail;

an input terminal operable to receive a control voltage;

an output terminal operable to provide an output current corresponding to the control voltage;

an op-amp including an inverting input terminal, a non-inverting input terminal, and an output terminal;

a metal-oxide semiconductor field-effect transistor (MOSFET) including a gate terminal, a source terminal, and a drain terminal, wherein the gate terminal is coupled to the output terminal of the op-amp and the drain terminal is coupled to the output terminal of the V/I converter;

a first voltage divider circuit including a first resistor, a second resistor, a third resistor, and a fourth resistor, wherein the source terminal of the MOSFET is coupled to a junction of the third and fourth resistors, wherein the fourth resistor is also coupled to the positive supply rail, wherein the inverting input terminal of the op-amp is coupled to a junction of the second and third resistors, and wherein the second resistor is coupled to the first resistor and the first resistor is coupled to the input terminal of the V/I converter; and

a second voltage divider circuit including a fifth resistor and a sixth resistor, wherein the non-inverting input terminal of the op-amp is coupled to a junction of the fifth and sixth resistors, and wherein the fifth resistor is also coupled to the positive supply rail and the sixth resistor is also coupled to ground; and

a protection circuit coupled to the V/I converter to prevent over-voltage and over-current conditions, the protection circuit including;

a Schottky diode coupled between the drain terminal of the MOSFET and an output terminal of the protection circuit;

a pn-junction diode coupled to a junction of the drain terminal of the MOSFET and the Schottky diode, wherein the pn-junction diode is also coupled to a seventh resistor;

a first bipolar junction transistor (BJT) including a base terminal, an emitter terminal, and a collector terminal, wherein the emitter terminal of the first BJT is coupled to the seventh resistor and the base terminal of the first BJT is coupled to ground, wherein the collector terminal of the first BJT is coupled to a junction of the positive supply rail and an eighth resistor; and

a second BJT including a base terminal, an emitter terminal, and a collector terminal, wherein the base terminal of the second BJT is coupled to the eighth resistor and the emitter terminal of the second BJT is coupled to the positive supply rail, wherein the collector terminal of the second BJT is coupled to the gate terminal of the transistor.