Density-aware dynamic leveling in scanning exposure systems
First Claim
1. A method for making an integrated circuit device such as a wafer wherein one or more steps of the method requires a photolithography step which includes leveling of the wafer comprising the steps of:
- loading a wafer into a wafer imaging photolithography exposure system;
pre-scanning the wafer to determine data on the topography of the wafer over different regions of the wafer;
assigning focus importance values to the different regions of the wafer;
calculating exposure focus instructions for the photolithography step based on the pre-scanned topography data and region focus importance values;
scanning and exposing the wafer based on the calculated exposure focus instructions; and
releasing the wafer and unloading the wafer from the exposure system.
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Abstract
A method and apparatus are provided for improving the leveling and, consequently, the focusing of a substrate such as a wafer during the photolithography imaging procedure of a semiconductor manufacturing process. The invention performs a pre-scan of the wafer'"'"'s topography and assigns importance values to different regions of the wafer surface. Exposure focus instructions are calculated based on the topography and importance values of the different regions and the wafer is then scanned and imaged based on the calculated exposure focus instructions.
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Citations
13 Claims
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1. A method for making an integrated circuit device such as a wafer wherein one or more steps of the method requires a photolithography step which includes leveling of the wafer comprising the steps of:
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loading a wafer into a wafer imaging photolithography exposure system; pre-scanning the wafer to determine data on the topography of the wafer over different regions of the wafer; assigning focus importance values to the different regions of the wafer; calculating exposure focus instructions for the photolithography step based on the pre-scanned topography data and region focus importance values; scanning and exposing the wafer based on the calculated exposure focus instructions; and releasing the wafer and unloading the wafer from the exposure system. - View Dependent Claims (2, 3, 4)
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5. An apparatus for making an integrated circuit device such as a wafer wherein photolithography means are used to image the wafer during the making of the wafer comprising:
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means for loading a wafer into a wafer imaging photolithography exposure system; a photolithography exposure system including means to pre-scan the wafer to determine data on the topography of the wafer over different regions of the wafer; means to assign focus importance values to the different regions of the wafer; means to calculate exposure focus instructions for the photolithography step based on the pre-scanned topography data and region focus important values; means for imaging the wafer; and means for releasing a wafer and unloading the wafer from the exposure system; wherein during the photolithography imaging step of the process the wafer is exposed based on the calculated exposure focus instructions during which the wafer is positioned in the system based on the calculated exposure focus instructions. - View Dependent Claims (6, 7, 8, 9, 10, 11, 12, 13)
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Specification