Programmable inter-virtual channel and intra-virtual channel instructions issuing rules for an I/O bus of a system-on-a-chip processor

• US 7,240,141 B2
• Filed: 04/09/2004
• Issued: 07/03/2007
• Est. Priority Date: 04/09/2004
• Status: Active Grant

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Go, Shun Wai, Ning, Chun Hung, Moll, Laurent Rene, Jamkhandi, Piyush Shashikant, Chui, Kwong-Tak
• Primary Examiner(s): Myers; Paul R.
• Application Number:
  US10/821,397
• Publication Number:
  US 20050228930A1
• Time in Patent Office: 1,180 Days
• Field of Search: 710/315
• US Class Current: 710/309
• CPC Class Codes: G06F 13/4031 with arbitration

Abstract

A method and apparatus for programming instruction issuing rules for instructions residing among various virtual channels, as well as the same virtual channel of an I/O bus interface for a system-on-a-chip processor. In the method and apparatus of the present invention both intra-virtual channel dependencies and inter-virtual channel dependencies are fully programmable, thereby offering significant advantages over prior art I/O interfaces. The method and apparatus of the present invention is broadly comprised of a system for managing data transactions between a first bus and a second bus. A first transaction conversion module is operably connected to the first bus and is operable to receive transactions from the first bus and a first format and to convert those transactions into an internal format. An ordering rules logic module is operably connected to the first transaction conversion module and is further operable to control issuing of transactions in accordance with a dependency relationship between the individual transactions. The ordering rules logic module generates validated transactions that are provided to a second conversion transaction module which is operably connected to the second bus. The ordering rules logic module of the present invention is fully programmable and, therefore, does not need to be redesigned when the data processing system is adapted to operate on a new bus system.

Claims

1. A system for managing data transactions between a first bus and a second bus, comprising:

a first transaction conversion module operably coupled to said first bus, said first transaction conversion module being operable to receive transactions from said first bus in a first format and to convert said transactions into an internal format;

a programmable ordering rules logic module operably coupled to said first transaction module to receive said converted transactions in said internal format and to control issuing of said transactions in accordance with a dependency relationship between individual converted transactions and further operable to issue validated transactions through a plurality of virtual channels using an inter-virtual channel arbiter and a plurality of intra-virtual channel arbiters; and

a second transaction conversion module operably coupled to said ordering logic module and to said second bus, said second transaction conversion module being operable to convert said validated transactions into a second format for said second bus.

2. The system of claim 1, wherein transactions on said first bus are managed using a first set of ordering rules and transactions on said second bus are managed using a second set of ordering rules.

3. The system of claim 1, wherein said transactions comprise a time stamp and wherein said ordering rules logic module is operable to use said time stamp to issue said validated transactions.

4. The system of claim 3, wherein said rules logic module is operable to validate said transactions using a protocol based on an efficiency algorithm optimizing the availability of said second bus to accept a validated transaction.

5. The system of claim 4, wherein said ordering rules logic module is programmed by a configuration status register.

6. A method for managing data transactions between a first bus and a second bus, comprising:

receiving a first transaction in a conversion module operably coupled to said first bus, said first transaction conversion module being operable to receive transactions from said first bus in a first format and to convert said transactions into an internal format;

receiving said converted transaction in a fully programmable ordering rules logic module operably coupled to said first transaction module;

using said ordering rules logic module to validate said converted transactions and to control issuing of validated transactions to a second transaction module in accordance with a dependency relationship between a plurality of transactions, wherein said validated transactions are issued through a plurality of virtual channels using an inter-virtual channel arbiter and a plurality of intra-virtual channel arbiters; and

using a second transaction conversion module to convert said validated transactions into a second format for said second bus.

7. The method of claim 6, wherein transactions on said first bus are managed using a first set of ordering rules and transactions on said second bus are managed using a second set of ordering rules.

8. The method of claim 7, wherein said transactions comprise a time stamp and wherein said ordering rules logic module is operable to use said time stamp to issue said validated transactions.

9. The method of claim 8, wherein said rules logic module is operable to validate said transactions using a protocol based on an efficiency algorithm optimizing the availability of said second bus to accept a validated transaction.

10. The method of claim 9, wherein said ordering rules logic module is programmed by a configuration status register.