Method of using a mask programmed key to securely configure a field programmable gate array

• US 7,240,218 B2
• Filed: 02/08/2001
• Issued: 07/03/2007
• Est. Priority Date: 02/08/2000
• Status: Expired due to Fees

• Current Assignee: Algotronix Ltd.
• Original Assignee: Algotronix Ltd.
• Inventors: Kean, Thomas A.
• Primary Examiner(s): Song; Hosuk
• Application Number:
  US09/780,681
• Publication Number:
  US 20010037458A1
• Time in Patent Office: 2,336 Days
• Field of Search: 380/268, 713/200, 713193-194, 713/170, 713/165, 713/189, 326/29, 326/39
• US Class Current: 713/193
• CPC Class Codes: G06F 12/1408 by using cryptography for digital transmission H04L9/00
• CPC Class Codes: G06F 21/62 Protecting access to data via a platform, e.g. using keys or access control rules
• CPC Class Codes: G06F 21/72 in cryptographic circuits
• CPC Class Codes: G06F 21/76 in application-specific integrated circuits [ASIC] or field-programmable devices, e.g. field-programmable gate arrays [FPGA] or programmable logic devices [PLD]

Abstract

A field programmable gate array has security configuration features to prevent monitoring of the configuration data for the field programmable gate array. The configuration data is encrypted by a security circuit of the field programmable gate array using a security key. This encrypted configuration data is stored in an external nonvolatile memory. To configure the field programmable gate array, the encrypted configuration data is decrypted by the security circuit of the field programmable gate array using the security key stored in the artwork of the field programmable gate array. The secret key consists of a number of bits of key information that are embedded within the photomasks used in manufacture the FPGA chip.

Claims

1. A method comprising:

storing a first secret key on an FPGA chip;

causing the FPGA to calculate a message authentication code (MAC) corresponding to a user design; and

storing the message authentication code with bitstream information in a nonvolatile memory external to the FPGA chip.

2. The method of claim 1 further comprising:

storing copyright messages with the bitstream information;

detecting unauthorized alterations to the bitstream using the message authentication code; and

preventing bitstreams which have been altered from being used to configure an FPGA.

3. The method of claim 1 further comprising:

recording the message authentication code along with corresponding identification information for a product containing the FPGA; and

examining the message authentication code stored in the nonvolatile memory of a product containing a pirated FPGA design, which will enable determining the identity of the customer to whom the pirated FPGA was originally supplied using a record of MACs and corresponding product identification.

4. A method comprising:

storing a first secret key on an FPGA chip;

using the first secret key and a user design to calculate a message authentication code (MAC) corresponding to the user design; and

storing the message authentication code with bitstream information in a nonvolatile memory external to the FPGA chip.

5. The method of claim 4 further comprising:

storing copyright messages with the bitstream information;

detecting unauthorized alterations to the bitstream using the message authentication code; and

preventing bitstreams which have been altered from being used to configure an FPGA.

6. The method of claim 4 further comprising:

recording the message authentication code along with corresponding identification information for a product containing the FPGA; and

examining the message authentication code stored in the nonvolatile memory of a product containing a pirated FPGA design, which will enable determining the identity of the customer to whom the pirated FPGA was originally supplied using a record of MACs and corresponding product identification.