Parallel concatenated code with soft-in soft-out interactive turbo decoder

• US 7,242,726 B2
• Filed: 06/08/2001
• Issued: 07/10/2007
• Est. Priority Date: 09/12/2000
• Status: Expired due to Term

• Current Assignee: Broadcom Corporation (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Shen, Ba-Zhong, Jones, Christopher R., Tran, Hau Thien, Cameron, Kelly B., Hughes, Thomas Ashford Jr.
• Primary Examiner(s): Ha; Dac
• Assistant Examiner(s): Wang; Ted M.
• Application Number:
  US09/878,148
• Publication Number:
  US 20020061071A1
• Time in Patent Office: 2,223 Days
• Field of Search: 375/295, 375/341, 375/265, 375/340, 375/262, 375/259, 375/240, 375/24, 375/335, 375/130, 375/146, 375/135, 375/232, 375/264, 375/298, 714/701, 714/762, 714/787, 714/775, 714/755, 714/788, 714/794, 714/786, 714/702, 714/746, 370/335, 370/201, 348/607, 341/106
• US Class Current: 375/295
• CPC Class Codes: H03M 13/151 using error location or error correction polynomials
• CPC Class Codes: H03M 13/1515 Reed-Solomon codes
• CPC Class Codes: H03M 13/25 Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
• CPC Class Codes: H03M 13/258 with turbo codes, e.g. Turbo Trellis Coded Modulation [TTCM]
• CPC Class Codes: H03M 13/27 using interleaving techniques
• CPC Class Codes: H03M 13/2757 Interleaver with an interleaving rule not provided for in the subgroups H03M13/2703 - H03M13/2753
• CPC Class Codes: H03M 13/29 combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
• CPC Class Codes: H03M 13/2966 Turbo codes concatenated with another code, e.g. an outer block code
• CPC Class Codes: H03M 13/2978 Particular arrangement of the component decoders
• CPC Class Codes: H03M 13/3905 Maximum a posteriori probability [MAP] decoding or approximations thereof based on trellis or lattice decoding, e.g. forward-backward algorithm, log-MAP decoding, max-log-MAP decoding
• CPC Class Codes: H03M 13/3922 Add-Compare-Select [ACS] operation in forward or backward recursions
• CPC Class Codes: H03M 13/3927 Log-Likelihood Ratio [LLR] computation by combination of forward and backward metrics into LLRs
• CPC Class Codes: H03M 13/3972 using sliding window techniques or parallel windows
• CPC Class Codes: H03M 13/3988 for rate k/n convolutional codes, with k>1, obtained by convolutional encoders with k inputs and n outputs
• CPC Class Codes: H03M 13/4107 implementing add, compare, select [ACS] operations
• CPC Class Codes: H03M 13/6505 Memory efficient implementations
• CPC Class Codes: H03M 13/6561 Parallelized implementations
• CPC Class Codes: H04L 1/0041 Arrangements at the transmitter end
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/006 Trellis-coded modulation
• CPC Class Codes: H04L 1/0065 : Serial concatenated codes
• CPC Class Codes: H04L 1/0066 : Parallel concatenated codes
• CPC Class Codes: H04L 1/0068 : by puncturing
• CPC Class Codes: H04L 1/0071 : Use of interleaving interleaving per se H03M13/27

Abstract

A method for parallel concatenated (Turbo) encoding and decoding. Turbo encoders receive a sequence of input data tuples and encode them. The input sequence may correspond to a sequence of an original data source, or to an already coded data sequence such as provided by a Reed-Soloman encoder. A turbo encoder generally comprises two or more encoders separated by one or more interleavers. The input data tuples may be interleaved using a modulo scheme in which the interleaving is according to some method (such as block or random interleaving) with the added stipulation that the input tuples may be interleaved only to interleaved positions having the same modulo-N (where N is an integer) as they have in the input data sequence. If all the input tuples are encoded by all encoders then output tuples can be chosen sequentially from the encoders and no tuples will be missed. If the input tuples comprise multiple bits, the bits may be interleaved independently to interleaved positions having the same modulo-N and the same bit position. This may improve the robustness of the code. A first encoder may have no interleaver or all encoders may have interleavers, whether the input tuple bits are interleaved independently or not. Modulo type interleaving also allows decoding in parallel.

Claims

1. A method for encoding an information signal, the method comprising:

nonsystematically encoding the information signal having N bits, wherein N is greater than 2;

separable tuple (ST) interleaving the information signal to form an interleaved information signal; and

encoding the interleaved information signal,

wherein ST interleaving the information signal comprises interleaving the N bits of the information signal separately.

2. The method of claim 1, wherein:

encoding the interleaved information signal further comprises nonsystematically encoding the interleaved information signal.

3. The method of claim 2, wherein:

the encoding further comprises convolutionally encoding.

4. The method of claim 2, wherein:

nonsystematically encoding further comprises recursively encoding.

5. The method of claim 1, wherein:

the interleaving comprises even-odd interleaving.

6. The method of claim 1:

wherein the interleaving comprises bit interleaving.

7. A The method of claim 5, further comprising:

selecting an odd encoding from the encoded information signal;

selecting an even encoding from the encoded interleaved information signal; and

concatenating the selected odd encoding to the selected even encoding to form a composite signal.

8. The method of claim 5, further comprising:

selecting an even encoding from the encoded information signal;

selecting an odd encoding from the encoded interleaved information signal; and

concatenating the selected odd encoding to the selected even encoding to form a composite signal.

9. The method of claim 7, further comprising:

mapping the composite signal in a signal mapper.

10. The method of claim 1, wherein:

the information signal comprises input tuples,

the interleaved information signal comprises output tuples, and

ST interleaving the information signal further comprises interleaving the input tuples of the information signal into different output tuples.

11. A method for encoding an information signal, comprising:

encoding the information signal having N input tuples, wherein N is greater than 2;

separable tuple (ST) interleaving the information signal to form an interleaved information signal having M output tuples, wherein M is greater than 2; and

encoding the interleaved information signal,

wherein ST interleaving the information signal comprises interleaving the N input tuples of the information signal into different M output tuples.

12. The method of claim 11, wherein:

encoding the interleaved information signal further comprises nonsystematically encoding the interleaved information signal.

13. The method of claim 12, wherein:

encoding further comprises convolutionally encoding.

14. The method of claim 11, wherein:

nonsystematically encoding further comprises recursively encoding.

15. The method of claim 11, wherein:

the interleaving comprises even-odd interleaving.

16. The method of claim 11, wherein:

ST interleaving further comprises interleaving bits of the information signal separately.

17. The method of claim 15, further comprising:

selecting an odd encoding from the encoded information signal;

selecting an even encoding from the encoded interleaved information signal; and

concatenating the selected odd encoding to the selected even encoding to form a composite signal.

18. The method of claim 14, further comprising:

selecting an even encoding from the encoded information signal;

selecting an odd encoding from the encoded interleaved information signal; and

concatenating the selected odd encoding to the selected even encoding to form a composite signal.

19. A method for generating a modulo-N interleaving sequence, the method comprising:

selecting a range of addresses from 0 to M for a seed interleaving sequence, wherein M is an integer;

creating N interleaving sequences from the seed sequence, wherein N is an integer;

creating a first sequence by selecting elements sequentially from the N interleaving sequences;

multiplying each element in the first sequence by N to create a second sequence; and

adding the element position modulo-N to each element in the second sequence to generate the modulo-N interleaving sequence.

20. The method of claim 19, wherein:

an interleaving sequence is created from the seed sequence by using the inverse sequence of the seed sequence.

21. The method of claim 19, wherein:

an interleaving sequence is created from the seed sequence by using the time reversal of the seed sequence.

22. The method of claim 19, wherein:

an interleaving sequence is created from the seed sequence by using the inverse of the time reversal of the seed sequence.