Smart verify for multi-state memories
First Claim
1. A method of operating a non-volatile multi-state memory having a plurality of storage elements, comprising:
- concurrently performing an operation to write selected ones of said storage elements to corresponding multi-state levels, the write operation including;
applying a series pulses of increasing amplitude to the selected storage elements; and
performing, between individual ones of the pulses, a process comprising;
verifying, with respect to a subset of said multi-state levels, the result of the preceding pulse on the selected storage elements;
locking out from further programming those of the selected storage elements that verify at the corresponding multi-state level;
discontinuing the write operation if all of the selected storage elements verify at the corresponding multi-state level; and
determining, based on the results of said verifying, whether to include in said subset additional multi-state levels in the verifying subsequent to the next pulse in the series.
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Abstract
A “smart verify” technique, whereby multi-state memories are programmed using a verify-results-based dynamic adjustment of the multi-states verify range for sequential-state-based verify implementations, is presented. This technique can increase multi-state write speed while maintaining reliable operation within sequentially verified, multi-state memory implementations by providing “intelligent” element to minimize the number of sequential verify operations for each program/verify/lockout step of the write sequence. At the beginning of a program/verify cycle sequence only the lowest state or states are checked during the verify phase. As lower states are reached, additional higher states are added to the verify sequence and lower states can be removed.
137 Citations
11 Claims
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1. A method of operating a non-volatile multi-state memory having a plurality of storage elements, comprising:
concurrently performing an operation to write selected ones of said storage elements to corresponding multi-state levels, the write operation including; applying a series pulses of increasing amplitude to the selected storage elements; and performing, between individual ones of the pulses, a process comprising; verifying, with respect to a subset of said multi-state levels, the result of the preceding pulse on the selected storage elements; locking out from further programming those of the selected storage elements that verify at the corresponding multi-state level; discontinuing the write operation if all of the selected storage elements verify at the corresponding multi-state level; and determining, based on the results of said verifying, whether to include in said subset additional multi-state levels in the verifying subsequent to the next pulse in the series. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
Specification