Method for fabricating semiconductor devices

• US 7,244,628 B2
• Filed: 05/21/2004
• Issued: 07/17/2007
• Est. Priority Date: 05/22/2003
• Status: Expired due to Fees

• Current Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Original Assignee: Matsushita Electric Industrial Company Limited (Panasonic Holdings Corporation)
• Inventors: Ueda, Tetsuzo, Tamura, Satoshi
• Primary Examiner(s): Baumeister; B. William
• Assistant Examiner(s): Reames; Matthew L.
• Application Number:
  US10/849,823
• Publication Number:
  US 20040235210A1
• Time in Patent Office: 1,152 Days
• Field of Search: 438/22, 438/33
• US Class Current: 438/33
• CPC Class Codes: H01L 21/2007 Bonding of semiconductor wafers to insulating substrates or to semiconducting substrates using an intermediate insulating layer H01L21/2011 takes precedence; bonding of semiconductor wafers to semiconductor wafers for junction formation H01L21/187
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate

Abstract

A method for fabricating semiconductor devices forms a semiconductor layer containing a positive layer on a mother substrate and then forms a metal layer on the semiconductor layer. After forming the metal layer, the method separates the mother substrate from the semiconductor layer and then removes a desired region of the metal layer from the exposed surface of the semiconductor layer from which the mother substrate has been separated to form a plurality of mutually separated semiconductor devices each containing the semiconductor layer.

Claims

1. A method for fabricating semiconductor devices, the method comprising the steps of:

forming a semiconductor layer containing a positive layer on a mother substrate;

forming a metal layer on the semiconductor layer;

separating the mother substrate from the semiconductor layer after forming the metal layer, thereby exposing a surface of the semiconductor layer; and

removing a desired region of the metal layer from the direction of the exposed surface of the semiconductor layer to form a plurality of mutually separated semiconductor devices each containing the semiconductor layer,

wherein the metal layer has a film thickness of 10 μ

m or more.

2. The method of claim 1, wherein the metal layer is composed of Au, Ag, or Cu.

3. The method of claim 1, wherein the metal layer is formed by plating.

4. The method of claim 1, wherein the step of separating the mother substrate is performed by irradiating a side of the semiconductor layer formed with the mother substrate with a laser.

5. The method of claim 1, wherein the step of separating the mother substrate is performed by polishing.

6. The method of claim 1, further comprising, between the step of forming the semiconductor layer and the step of separating the mother substrate, the step of:

partly removing the semiconductor layer from a side of the semiconductor layer opposite to the side thereof formed with the mother substrate to separate the semiconductor layer into a plurality of regions, wherein

the plurality of semiconductor devices contain the plurality of respective regions.

7. The method of claim 1, further comprising, between the step of forming the metal layer and the step of forming the plurality of semiconductor devices, the step of:

forming a polymer material film having an adhesive property on a surface of the metal layer opposite to a surface thereof formed with the semiconductor layer.

8. The method of claim 7, wherein the polymer material film is composed of a material having a stretching property.

9. The method of claim 1, further comprising, between the step of forming the metal layer and the step of separating the mother substrate, the step of:

forming a semiconductor substrate having a cleaving property on a surface of the metal layer opposite to a surface thereof formed with the semiconductor layer.

10. The method of claim 9, wherein the semiconductor substrate is composed of Si or SiC.

11. The method of claim 9, wherein the step of forming the plurality of semiconductor devices includes the steps of:

forming a trenched portion in a surface of the semiconductor substrate which has been exposed by removing the desired region of the metal layer; and

cleaving the semiconductor substrate formed with the trenched portion to form the plurality of semiconductor devices.

12. The method of claim 1, wherein the semiconductor layer is composed of a group III nitride semiconductor.

13. The method of claim 1, further comprising, after the step of separating the mother substrate and before the step of removing the desired region of the metal layer, the step of:

forming a passivation film on the semiconductor layer.