Drive circuit device for display device, and display device using the same

• US 7,245,281 B2
• Filed: 03/20/2002
• Issued: 07/17/2007
• Est. Priority Date: 09/12/2001
• Status: Expired due to Term

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Furukoshi, Yasutake, Sekido, Satoshi, Fukutoku, Syouichi
• Primary Examiner(s): Shalwala; Bipin
• Assistant Examiner(s): DHARIA, PRABODH M
• Application Number:
  US10/102,264
• Publication Number:
  US 20030048249A1
• Time in Patent Office: 1,945 Days
• Field of Search: 345/87, 345 89- 98, 345/145, 345/100, 345/180, 345/197, 345/198, 345/55, 345/90, 345/92, 345/93, 345/204, 345/209, 345/210, 345/213, 345/8, 345/551, 345/520, 345/179, 345/174, 395/157, 370/447, 348/731, 348/671, 365/233, 365/194, 365/193, 326/56, 326/21, 711/154, 711/167
• US Class Current: 345/87
• CPC Class Codes: G09G 2300/0426 Layout of electrodes and connections
• CPC Class Codes: G09G 2330/021 Power management, e.g. power saving
• CPC Class Codes: G09G 2330/06 Handling electromagnetic interferences [EMI], covering emitted as well as received electromagnetic radiation
• CPC Class Codes: G09G 3/3614 Control of polarity reversal in general
• CPC Class Codes: G09G 3/3677 suitable for active matrices only
• CPC Class Codes: G09G 3/3688 suitable for active matrices only

Abstract

A drive circuit device for a display device which drives a plurality of source bus lines provided on a display panel includes a driver unit that receives a clock signal, a data signal and a control signal, sequentially fetches the data signal, and generates drive signals for the source bus lines in accordance to the fetched data signal. The device further includes a gate unit that, after elapse of specified time from the reception of the driver unit, and at a timing when a rear-stage drive circuit device starts receiving, starts outputting of a propagation signal including at least one of the clock signal, data signal and control signal to the rear-stage drive circuit device. Consequently, the power consumption required for supplying these signals and the generated amount of electromagnetic waves resulting from the signal supply can be suppressed.

Claims

1. A drive circuit device for a display device which drives a part of a plurality of bus lines disposed on a display panel and is connectable to a rear-stage drive circuit device via propagation signal line, the drive circuit device comprising:

a driver unit that receives a propagation signal including at least one of a clock signal and a control signal, and generates a drive signal for the bus lines according to the received propagation signal, said propagation signal changing during a synchronization period in synchronization with a synchronization signal; and

a gate unit that, at the timing when the rear-stage drive circuit device starts receiving the propagation signal, after elapse of predetermined time from the reception of the propagation signal by the driver unit, starts outputting of the propagation signal to the rear-stage drive circuit device via the propagation signal line, and that does not output the received propagation signal during the predetermined time to the rear-stage drive circuit device via the propagation signal line so as to suppress magnetic wave at the propagation signal line, where in the rear-stage drive circuit device generates a drive signal for the rear-stage bus lines according to the received propagation signal.

14. A display device having a plurality of drive circuit devices according to any one of claims 1, 2, or 8 that are connected in tandem, the display device further comprising a display panel to which the plurality of drive circuit devices are connected, the display panel being provided with a plurality of source bus lines and a plurality of gate bus lines that intersect the source bus lines.

2. A drive circuit device for a display device which drives a part of a plurality of source bus lines disposed on a display panel and is connectable to a rear-stage drive circuit device via propagation signal line, the drive circuit device comprising:

a driver unit that receives a clock signal, a data signal and a control signal, and sequentially fetches the data signal to generate a drive signal for the source bus lines in accordance to the fetched data signal; and

a gate unit that does not output a propagation signal, including at least one of the clock signal, data signal and control signal, to the rear-stage drive circuit device during the sequential fetching of the data signal by the driver unit, and starts outputting of the propagation signal to the rear-stage drive circuit device at the timing when the rear-stage drive circuit device starts receiving the propagation signal via the propagation signal line so as to suppress magnetic wave at the propagation signal line, after the sequential fetching, where in the rear stage drive circuit device generates a drive signal for the rear-stage bus lines according to the received propagation signal, and wherein said propagation signal changes during a synchronization period in synchronizing with a synchronization signal.

3. The drive circuit device according to claim 2, wherein the control signal includes an invert control signal indicative of “

invert”

, or “

non-invert”

of the data signal.

4. The drive circuit device according to claim 2, wherein the driver device receives an input cascade signal to control the start of fetch of the data signal, and outputs an output cascade signal to control the fetch of the data signal at the rear stage, after the completion of fetching of the data signal.

5. The drive circuit device according to claim 4, further comprising:

a gate control circuit that inputs the input cascade signal and clock signal, and generates a gate control signal to control the gate unit to start outputting of the propagation signal.

6. The drive circuit according to claim 4, wherein the gate unit starts outputting of the propagation signal, in response to the output cascade signal.

7. The drive circuit device according to claim 4, further comprising a data register to fetch and hold the data signal at the timing of the clock signal, in response to the input cascade signal.

8. A drive circuit device for a display device which sequentially drives a part of a plurality of gate bus lines disposed on a display panel and is connectable to a rear-stage drive circuit device via propagation signal line, the drive circuit device comprising:

a driver unit that receives a clock signal and a control signal, and sequentially generates drive signals for the gate bus lines, in synchronism with the clock signal; and

a gate unit that does not output the propagation signal to the rear-stage drive circuit unit via the propagation signal line so as to suppress magnetic wave at the propagation signal line, wherein said propagation signal changes during a synchronization period in synchronizing with a synchronization signal, and where in the rear stage drive circuit device generates a drive signal for the rear-stage bus lines according to the received propagation signal.

9. The drive circuit device according to claim 8, wherein the control signal includes an output enable signal to control the outputting period of the drive signal generated by the driver unit.

10. The drive circuit device according to claim 8, wherein the drive circuit device receives an input cascade signal to control the start of fetching of the clock signal, and outputs an output cascade signal to control the fetching of the clock signal at the rear stage, after the completion of generation of the drive signals for the gate bus lines.

11. The drive circuit device according to claim 10, further comprising a gate control circuit which inputs the input cascade signal and the clock signal, and generates a gate control signal to control the gate unit to start outputting of the propagation signal.

12. The drive circuit device according to claim 10, wherein the gate unit starts outputting of the propagation signal, in response to the output cascade signal.

13. The drive circuit device according to claim 10, further comprising a gate drive signal generator circuit to generate the drive signals at the timing of the clock signal, in response to the input cascade signal.

15. A display device comprising:

a display panel having a plurality of source buses, a plurality of gate buses cross-connecting to the source buses, and a plurality of pixels at cross-connecting positions thereof; and

a plurality of drive circuit units, provided to the display panel, for driving of the gate buses or the sources buses, wherein each of said plurality of drive circuit units includes;

a driver unit that receives a propagation signal including at least one of a clock signal and a control signal, and generates a drive signal for the gate buses according to the received propagation signal, said propagation signal changing during a synchronization period in syndhronization with a synchronization signal; and

a gate unit that does not output the propagation signal received during a predetermined time from the reception of the propagation signal by the driver unit to the rear-stage drive circuit unit via the propagation signal line connected to the rear-stage drive circuit unit, and starts outputting of the propagation signal to the rear-stage drive circuit unit at the timing when the rear-stage drive circuit unit starts receiving the propagation signal after elapse of the predetermined time via the propagation signal line so as to suppress magnetic wave at the propagation signal line, where in the rear-stage drive circuit device generates a drive signal for the rear-stage bus lines according to the received propagation signal.

16. A display device comprising:

a display panel having a plurality of source buses, a plurality of gate buses cross-connecting to the source buses, and a plurality of pixels at cross-connecting positions thereof; and

a plurality of drive circuits units provided to the display panel, for driving a part of the source buses, wherein each of said plurality of drive circuit units includes;

a driver unit that receives a clock signal, a data signal and a control signal, the data signal being sequentially changed for each source bus, and sequentially fetches the data signal to generate a drive signal for the source bus in accordance to the fetched data signal; and

a gate unit that does not output a propagation signal including at least one of the clock signal, data signal and control signal to the rear-stage drive circuit unit during the sequential fetching of the data signal by the driver unit, and starts outputting of the propagation signal to the rear-stage drive circuit unit after the sequential fetching via a propagation signal line connected to the rear-stage drive unit so as to suppress magnetic wave at the propagation signal line, wherein said propagation signal changes during a synchronization period in synchronizing with a synchronization signal, and

where in the rear stage drive circuit device generates a drive signal for the rear-stage bus lines according to the received propagation signal.

17. A display device comprising:

a display panel having a plurality of source buses, a plurality of gate buses cross-connecting to the source buses, and a plurality of pixels at cross-connecting positions thereof; and

a plurality of drive circuit units, provided to the display panel, for driving apart of the gate buses, wherein each of said plurality of drive circuit units includes a driver unit that receives a clock signal and a control signal, and sequentially generates drive signals for the gate bus lines, in synchronism with the clock signal; and

a gate unit that does not output the propagation signal to the rear-stage drive circuit device during the generation of the drive signals by the driver unit, and starts outputting of the propagation signal to a rear-stage drive circuit unit via a propagation signal line connected to the rear-stage drive unit so as to suppress magnetic wave at the propagation signal line, wherein said propagation signal changes during a synchronization period in synchronizing with a synchronization signal, and where in the rear stage drive circuit device generates a drive signal for the rear-stage bus lines according to the received propagation signal.