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Efficient memory check architecture and method

  • US 7,246,269 B1
  • Filed: 05/05/2004
  • Issued: 07/17/2007
  • Est. Priority Date: 05/05/2004
  • Status: Expired due to Fees
First Claim
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1. A method of testing a memory coupled to a processing node comprising the steps of:

  • initializing, responsive to the processing node executing a basic input/output system (BIOS) program, a background scrubber in the processing node to perform a test of the memory;

    checking a status of said background scrubber in which said status indicates whether an error occurred during said test; and

    taking a predetermined action in response to said status indicating that said error occurred during said test.

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