Radio telecommunications system operative by interactive determination of soft estimates, and a corresponding method

• US 7,248,647 B2
• Filed: 08/18/2003
• Issued: 07/24/2007
• Est. Priority Date: 08/21/2002
• Status: Expired due to Fees

• Current Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Original Assignee: Lucent Technologies, Inc. (Nokia Corporation)
• Inventors: Claussen, Holger, Karimi, Hamid Reza
• Primary Examiner(s): Payne; David C.
• Assistant Examiner(s): Ettehadieh; Aslan
• Application Number:
  US10/643,182
• Publication Number:
  US 20040038653A1
• Time in Patent Office: 1,436 Days
• Field of Search: 375/133, 375/141, 375/260, 375/267, 375/269, 375/279, 375/295, 375/299, 375/308, 375/316, 375/329, 375/349, 455/500, 455/103, 370/320, 370/334, 370/335, 370/342, 370/441, 332/103
• US Class Current: 375/308
• CPC Class Codes: H03M 13/25 Error detection or forward error correction by signal space coding, i.e. adding redundancy in the signal constellation, e.g. Trellis Coded Modulation [TCM] modulation codes H03M13/31
• CPC Class Codes: H03M 13/29 combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
• CPC Class Codes: H03M 13/2948 Iterative decoding H03M13/2957 takes precedence
• CPC Class Codes: H03M 13/2957 Turbo codes and decoding
• CPC Class Codes: H03M 13/31 combining coding for error detection or correction and efficient use of the spectrum without error detection or correction H03M5/14 , H03M5/145
• CPC Class Codes: H03M 13/3746 with iterative decoding
• CPC Class Codes: H03M 13/63 Joint error correction and other techniques H03M13/31 and H03M13/33 take precedence
• CPC Class Codes: H04L 1/005 Iterative decoding, including iteration between signal detection and decoding operation
• CPC Class Codes: H04L 1/0059 Convolutional codes
• CPC Class Codes: H04L 1/0071 Use of interleaving interleaving per se H03M13/27
• CPC Class Codes: H04L 2001/0098 Unequal error protection
• CPC Class Codes: H04L 25/067 providing soft decisions, i.e. decisions together with an estimate of reliability H04L25/068 and H04L25/069 take precedence; sequence estimation techniques H04L25/03178
• CPC Class Codes: H04L 27/38 Demodulator circuits; Receiver circuits

Abstract

A system to communicate digital data symbols with higher than QPSK modulation comprises a transmitter and receiver. The transmitter comprises, a modulator and circuitry to split and encode the data into a first block of more significant bits and a second block of less significant bits for modulating by. The receiver receives digital data bits by iterative determination of soft estimates of bits followed by a hard decision as to what bit was intended, and comprises a first processor to provide first soft estimates of bits of the received signal, and a second processor to decode the first soft estimates and to provide second soft estimates of the bits. The receiver also comprises a first combiner to provide adapted first soft estimates to the second processor, the adapted first soft estimates of each bit being dependent upon the respective first soft estimate and a respective previous first soft estimate, and a second combiner to provide third soft estimates back to the first processor for subsequent further decoding, the third soft estimates of each bit being dependent upon the respective second soft estimate and a respective previous second soft estimate.

Claims

1. A system operative to communicate digital data symbols with higher than quadrature phase shift keying (QPSK) modulation, the system comprising a transmitter and a receiver comprising:

the transmitter comprising a modulator and means to split and encode the data into a first block of more significant bits of symbols and a second block of less significant bits of the symbols for modulating by the modulator;

the receiver being operative to receive digital data bits by iterative determination of soft estimates of bits followed by a hard decision as to what bit was intended, the receiver comprising;

a first processor operative to provide first soft estimates of bits of the received signal;

a second processor operative to decode the first soft estimates and to provide second soft estimates of the bits;

a first combiner operative to provide adapted first soft estimates to the second processor, the adapted first soft estimates of each bit being dependent upon a respective first soft estimate and a respective previous first soft estimate; and

a second combiner operative to provide third soft estimates back to the first processor for subsequent further decoding, the third soft estimates of each bit being dependent upon a respective second soft estimate and a respective previous second soft estimate;

wherein the more significant bits are detected in the received signal in a first series of iterations, their estimated contribution to the received signal being subtracted to provide a modified received signal from which the less significant bits are detected by a second series of iterations.

2. A system according to claim 1, wherein the means comprises a first convolutional encoder operative to produce blocks of the more significant bits, a second convolutional encoder operative to produce blocks of less significant bits, and respective interleavers each operative to interleave the blocks from the associated encoder into a respective data stream for modulating.

3. A system according to claim 1, wherein the soft estimates of multiple data streams multiplexed into one stream at the output of the first processor, and provided to the first combiner to provide the adapted first soft estimates are deinterleaved by a deinterleaver before being passed to the second processor, and the third soft estimates provided by the second combiner interleaved by an interleaver before being passed back to the first processor.

4. A system according to claim 1, wherein the first processor is a successive interference cancellation SIC multiple input multiple output MIMO detector and the second processor is a convolutional decoder, the soft estimates being log likelihood ratios.

5. A system according to claim 4, wherein the SIC MIMO detector includes matched filters for detection.

6. A system according to claim 1, wherein the modulation scheme is 16 Quadrature amplitude modulation, the first two bits of a symbol being provided, by the first convolutional encoder, and the last two bits of a symbol being provided by the second convolutional encoder.

7. A system according to claim 1, wherein, a plurality of detection iterations each involving the first processor, second processor and the combiners are performed whereupon a hard decision is made.

8. A method of communicating digital data symbols with higher than quadrature phase shift keying (“

QPSK”

) modulation method comprising the steps of;

splitting and encoding the data into a first block of more significant bits and a second block of less significant bits for modulating by a modulator;

receiving digital data bits by iterative determination of soft estimates of symbols or bits followed by a hard decision as to what bit was intended, by;

providing first soft estimates of bits of the received signal;

decoding the first soft estimates and providing second soft estimates of the bits;

providing adapted first soft estimates, the adapted first soft estimates of each bit being dependent upon a respective first soft estimate and a respective previous first soft estimate;

providing third soft estimates back for subsequent further decoding, the third soft estimates of each bit being dependent upon a respective second soft estimate and a respective previous second soft estimate;

wherein the more significant bits are detected in the received signal in a first series of iterations, their estimated contribution to the received signal being subtracted to provide a modified received signal from which the less significant bits are detected by a second series of iterations.