Method of fabricating vertical structure LEDs

• US 7,250,638 B2
• Filed: 09/23/2005
• Issued: 07/31/2007
• Est. Priority Date: 04/09/2002
• Status: Expired due to Term

• Current Assignee: Suzhou Lekin Semiconductor Company Limited
• Original Assignee: LG Electronics, Inc. (LG Corporation)
• Inventors: Yoo, Myung Cheol, Lee, Jong-Lam, Jeong, In-kwon
• Primary Examiner(s): Pert; Evan
• Assistant Examiner(s): MANDALA, VICTOR A
• Application Number:
  US11/232,956
• Publication Number:
  US 20060071230A1
• Time in Patent Office: 676 Days
• Field of Search: 257/79, 257/99, 257/103, 257/E33.025, 257/E33.028, 257/E33.033, 438/22
• US Class Current: 257/99
• CPC Class Codes: H01C 7/006 Thin film resistors
• CPC Class Codes: H01C 7/008 Thermistors H01C7/02 - H01C7/06 take precedence
• CPC Class Codes: H01L 27/0802 Resistors only
• CPC Class Codes: H01L 28/20 Resistors
• CPC Class Codes: H01L 33/0025 comprising only AIIIBV compounds
• CPC Class Codes: H01L 33/007 comprising nitride compounds
• CPC Class Codes: H01L 33/0093 Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/0095 Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
• CPC Class Codes: H01L 33/06 within the light emitting region, e.g. quantum confinement structure or tunnel barrier
• CPC Class Codes: H01L 33/12 with a stress relaxation structure, e.g. buffer layer
• CPC Class Codes: H01L 33/32 containing nitrogen
• CPC Class Codes: H01L 33/36 characterised by the electrodes
• CPC Class Codes: H01L 33/38 with a particular shape
• CPC Class Codes: H01L 33/40 Materials therefor
• CPC Class Codes: H01L 33/44 characterised by the coatings, e.g. passivation layer or anti-reflective coating
• CPC Class Codes: H01L 33/62 Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: Y10S 438/958 Passivation layer
• CPC Class Codes: Y10S 438/977 Thinning or removal of substrate

Abstract

A method of fabricating semiconductor devices, such as GaN LEDs, on insulating substrates, such as sapphire. Semiconductor layers are produced on the insulating substrate using normal semiconductor processing techniques. Trenches that define the boundaries of the individual devices are then formed through the semiconductor layers and into the insulating substrate, beneficially by using inductive coupled plasma reactive ion etching. The trenches are then filled with an easily removed layer. A metal support structure is then formed on the semiconductor layers (such as by plating or by deposition) and the insulating substrate is removed. Electrical contacts, a passivation layer, and metallic pads are then added to the individual devices, and the individual devices are then diced out.

Claims

1. A vertical light emitting device, comprising:

a support layer;

a first GaN-based layer;

a first electrode disposed between the support layer and the first GaN-based layer such that the first GaN-based layer is over the first electrode;

a second GaN-based layer;

a light emitting layer disposed between the first and second GaN-based layers;

a passivation layer over exposed portions of the first GaN-based layer, of the light emitting layer, and of the second GaN-based layer; and

a second electrode over the second GaN-based layer.

2. The vertical light emitting device of claim 1, wherein the first GaN-based layer is a p-GaN layer and the second GaN-based layer is an n-GaN layer.

3. The vertical light emitting device of claim 1, wherein the first GaN-based layer is an n-GaN layer and the second GaN-based layer is a p-GaN layer.

4. The vertical light emitting device of claim 1, wherein the light emitting layer is an InGaN/GaN active layer.

5. The vertical light emitting device of claim 1, further comprising a metal pad over the second electrode.

6. The vertical light emitting device of claim 1, wherein the passivation layer extends over part of the second electrode.

7. The vertical light emitting device of claim 1, wherein the passivation layer includes a material selected from a group including SiO₂ and Si₃N₄.

8. The vertical light emitting device of claim 1, wherein the support layer is a metallic layer.

9. The vertical light emitting device of claim 1, wherein the support layer includes a metal selected from a group including Cu, Cr, Ni, Au, Ag, Mo, Pt, Pd, W, and Al.

10. The vertical light emitting device of claim 1, wherein the support layer includes a metal-containing material.

11. The vertical light emitting device of claim 10, wherein the metal-containing material includes titanium nitride.

12. The vertical light emitting device of claim 1, wherein the support layer is formed by any one of electroplating, electro-less plating, CVD, and sputtering.

13. A vertical light emitting device, comprising:

a metallic support layer;

a first GaN-based layer formed adjacent to the metallic support layer;

an electrode formed between the first GaN-based layer and the metallic support layer;

a second GaN-based layer;

a light emitting layer disposed between the first and second GaN-based layers; and

a plurality of passivation layers surrounding at least two side portions of the first GaN-based layer, of the light emitting layer, and of the second GaN-based layer such that the electrode is disposed between the plurality of passivation layers.