Low voltage differential signaling driving apparatus

• US 7,250,793 B2
• Filed: 01/12/2004
• Issued: 07/31/2007
• Est. Priority Date: 01/20/2003
• Status: Active Grant

• Current Assignee: Realtek Semiconductor Corp.
• Original Assignee: Realtek Semiconductor Corp.
• Inventors: Lu, Chao-Hsin
• Primary Examiner(s): NGUYEN, LONG T
• Application Number:
  US10/754,726
• Publication Number:
  US 20040150434A1
• Time in Patent Office: 1,296 Days
• Field of Search: 327108-112, 327/170, 327/379, 327/389, 327/391, 327/337, 327/427, 327/581, 327/65, 327 68- 70, 327/563, 326/23, 326/24, 326/27, 326/82, 326/83, 326/86, 330/253, 330/255, 330262-264, 330/269
• US Class Current: 327/108
• CPC Class Codes: H04L 25/028 Arrangements specific to the transmitter end

Abstract

A low voltage differential signaling (LVDS) driving apparatus is disclosed, which comprises an LVDS output circuit to output an LVDS differential signal; a switch circuit coupled to the LVDS output circuit to control the phase of the LVDS differential signal; and a reference current control circuit to provide a control voltage to the LVDS output circuit such that the magnitude of the LVDS differential signal is determined based on the control voltage.

Claims

1. A driving circuit for outputting a differential signal, comprising:

an output circuit for outputting the differential signal according to a first voltage and a second voltage;

a control signal generator, coupled to the output circuit, for generating the first voltage and the second voltage, comprising;

a current mirror, comprising;

a first transistor having a gate;

a reference current generator, coupled to the gate of the first transistor, for providing a reference current; and

a second transistor having a gate coupled to the gate of the first transistor and the reference current generator;

a first conducting path, coupled to the gate of the first transistor, the gate of the second transistor and the reference current generator, for providing the first voltage to the output circuit according to the voltage of the gates of the first and second transistors; and

a second voltage generator for generating the second voltage to the output circuit; and

a switching circuit, coupled between the output circuit and the control signal generator, for controlling the coupling and decoupling relation between the output circuit and the control signal generator such that the differential signal representing logic high or logic low according to the coupling and decoupling relation between the output circuit and the control signal generator.

2. The driving circuit according to claim 1, wherein the second voltage generator couples to the current mirror and generates the second voltage according to the reference current.

3. The driving circuit according to claim 2, wherein the second voltage generator comprises:

an operational amplifier, coupled to the current mirror, for generating the second voltage according to the reference current and a predetermined voltage; and

a second conducting path, coupled to the operational amplifier, for providing the second voltage to the output circuit.

4. The driving circuit according to claim 1, wherein the switching circuit controls the coupling and decoupling relation between the output circuit and the control signal generator according to a switching signal and an inverse signal of the switching signal.

5. The driving circuit according to claim 4, wherein the switching circuit comprises:

a plurality of first switches, the on/off state of the first switches being determined by the switching signal; and

a plurality of second switches, the on/off state of the second switches being determined by the inverse signal;

wherein the on/off state of the first switches is opposite to the on/off state of the second switches.

6. The driving circuit according to claim 1, wherein the differential signal is a low voltage differential signal (LVDS).

7. A driving circuit for outputting a differential signal, comprising:

an output circuit for outputting the differential signal according to a first voltage and a second voltage, comprising;

a first transistor operating in response to the first voltage;

a second transistor, coupled to the first transistor, operating in response to the second voltage;

a first node between the first transistor and the second transistor for outputting a part of the differential signal;

a third transistor operating in response to the first voltage;

a fourth transistor, coupled to the third transistor, operating in response to the second voltage; and

a second node between the third transistor and the fourth transistor for outputting the other part of the differential signal;

a control signal generator, coupled to the output circuit, for generating the first voltage and the second voltage, comprising;

a voltage generating circuit for generating the first voltage and the second voltage;

a first conducting path, coupled between the voltage generating circuit and the first transistor, for providing the first voltage to the first transistor according to a switching control;

a second conducting path, coupled between the voltage generating circuit and the second transistor, for providing the second voltage to the second transistor according to the switching control;

a third conducting path, coupled between the voltage generating circuit and the third transistor, for providing the first voltage to the third transistor according to the switching control; and

a fourth conducting path, coupled between the voltage generating circuit and the fourth transistor, for providing the second voltage to the fourth transistor according to the switching control; and

a switching circuit, coupled between the output circuit and the control circuit generator, for determining the switching control that controls the coupling and decoupling relation between the output circuit and the control signal generator such that the differential signal representing logic high or logic low according to the coupling and decoupling relation between the output circuit and the control signal generator, the switching circuit comprising;

a first switch coupled between the control signal generator and the first transistor, the on/off state of the first switch determining whether the first conducting path provides the first voltage to the first transistor;

a second switch coupled between the control signal generator and the second transistor, the on/off state of the second switch determining whether the second conducting path provides the second voltage to the second transistor;

a third switch coupled between the control signal generator and the third transistor, the on/off state of the third switch determining whether the third conducting path provides the first voltage to the third transistor; and

a fourth switch coupled between the control signal generator and the fourth transistor, the on/off state of the fourth switch determining whether the fourth conducting path provides the second voltage to the fourth transistor.

8. The driving circuit according to claim 7, wherein the on/off state of the first and fourth switches is determined by a switching signal and the on/off state of the second and third switches is determined by an inverse signal of the switching signal.

9. The driving circuit according to claim 8, wherein on/off state of the first and fourth switches is opposite to the on/off state of the second and third switches.

10. The driving circuit according to claim 7, wherein the differential signal is a low voltage differential signal (LVDS).

11. The driving circuit according to claim 7, wherein the first, second, third and fourth transistors are MOS transistors.

12. The driving circuit according to claim 11, wherein the first and third transistors are PMOS transistors while the second and fourth transistors are NMOS transistors.