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Saucer-shaped half-loop MEMS inductor with very low resistance

  • US 7,250,841 B1
  • Filed: 08/25/2005
  • Issued: 07/31/2007
  • Est. Priority Date: 08/25/2005
  • Status: Active Grant
First Claim
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1. An inductive semiconductor structure comprising:

  • a first via;

    a second via;

    a first conductive plate having a first region that contacts the first via, and a second region spaced-apart from the first via;

    a second conductive plate that lies over the first conductive plate, the second conductive plate having a first region that contacts the second via, and a second region spaced-apart from the second via;

    a conductive sidewall that has a bottom surface and a top surface, the bottom surface contacting the second region of the first conductive plate, and being spaced apart from the first region of the first conductive plate, the top surface contacting the second region of the second conductive plate, and being spaced apart from the first region of the second conductive plate; and

    a magnetic core structure located between the first conductive plate and the second conductive plate, the magnetic core structure being electrically isolated from all other conductive regions.

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