Semiconductor storage apparatus
First Claim
Patent Images
1. A semiconductor storage apparatus, comprising:
- floating body cells (FBCs) which need refresh operation;
a refresh control circuit which terminates an on-going refresh operation when an external access for reading out from or writing into the FBCs is requested;
a first time measuring unit which measures a first period after the refresh operation is begun, until the next refresh operation is begun afterwards;
a second time measuring unit which measures a second period necessary for the refresh operation; and
an address generator which generates addresses of the FBCs for the refresh operation,wherein the refresh control circuit controls a timing of the refresh operation based on the outputs of the first and second time measuring units and an external access request signal.
1 Assignment
0 Petitions
Accused Products
Abstract
A semiconductor storage apparatus according to one embodiment of the present invention, comprising: memory cells which need refresh operation; and a refresh control circuit which suspends the refresh operation when external access for reading out from or writing into the memory cells is requested.
-
Citations
16 Claims
-
1. A semiconductor storage apparatus, comprising:
-
floating body cells (FBCs) which need refresh operation; a refresh control circuit which terminates an on-going refresh operation when an external access for reading out from or writing into the FBCs is requested; a first time measuring unit which measures a first period after the refresh operation is begun, until the next refresh operation is begun afterwards; a second time measuring unit which measures a second period necessary for the refresh operation; and an address generator which generates addresses of the FBCs for the refresh operation, wherein the refresh control circuit controls a timing of the refresh operation based on the outputs of the first and second time measuring units and an external access request signal. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
-
-
10. A semiconductor storage apparatus comprising:
-
floating body cells (FBCs) which need refresh operation; a refresh control circuit which terminates an on-going refresh operation when an external access for reading out from or writing into the FBCs is requested; and a refresh timing adjustment circuit which generates a refresh timing adjustment signal for adjusting a timing of a refresh period, based on an external access request signal and a refresh request signal, wherein the refresh control circuit controls the refresh operation based on the refresh timing adjustment signal. - View Dependent Claims (11)
-
-
12. A refreshing method, comprising:
-
terminating an on-going refresh operation when an external access for reading out from or writing into the floating body cells (FBCs) is requested; completing the refresh operation during a period after the external access has completed, until a next refresh operation is begun; measuring a first period after the refresh operation is begun, until the next refresh operation is begun afterwards; measuring a second period necessary for the refresh operation; and generating addresses of the FBCs for the refresh operation, wherein a timing of the refresh operation is controlled based on a result of measuring the first period, a result of measuring the second period and an external access request signal. - View Dependent Claims (13, 14, 15, 16)
-
Specification