System and method for determining a global ordering of events using timestamps
First Claim
1. In an isochronous electronic device including at least one processor and a plurality of chips, each said chip associated with a local time counter of a plurality of local time counters, a method for determining a global ordering of events, said method comprising:
- detecting an event associated with one of said plurality of chips;
generating a timestamp with said local time counter at the time of the occurrence of said detected event, said timestamp being associated with said event;
comparing said event and a normalized form of said timestamp with other events and associated normalized timestamps to determine an order of occurrence;
providing a Time Base selected by said processor, said Time Base being a baseline time value; and
transmitting a reset instruction from said processor to said plurality of local time counters associated with said plurality of chips, said plurality of local time counters resetting to a designated time so as to be synchronized with respect to each other;
wherein the transmitting of the reset instruction is staggered so as to ensure that said resetting occurs simultaneously, said transmitting taking into account delays caused by network topology.
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Abstract
A method of utilizing timestamps for the global ordering of event information, particularly hardware error reporting, is disclosed. Locally generated time stamps are associated with hardware errors or other events. The timestamps form the basis for the global ordering of event information. The timestamps are normalized, either through a pre-synchronization process with a common time, or through the use of offsets maintained either locally near system chips or by the system processor. Once normalized, the timestamps can be compared to determine a first occurring event among multiple reported events.
38 Citations
16 Claims
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1. In an isochronous electronic device including at least one processor and a plurality of chips, each said chip associated with a local time counter of a plurality of local time counters, a method for determining a global ordering of events, said method comprising:
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detecting an event associated with one of said plurality of chips; generating a timestamp with said local time counter at the time of the occurrence of said detected event, said timestamp being associated with said event; comparing said event and a normalized form of said timestamp with other events and associated normalized timestamps to determine an order of occurrence; providing a Time Base selected by said processor, said Time Base being a baseline time value; and transmitting a reset instruction from said processor to said plurality of local time counters associated with said plurality of chips, said plurality of local time counters resetting to a designated time so as to be synchronized with respect to each other; wherein the transmitting of the reset instruction is staggered so as to ensure that said resetting occurs simultaneously, said transmitting taking into account delays caused by network topology. - View Dependent Claims (2, 3, 4, 5)
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6. In an electronic device including at least one processor and a plurality of chips, each said chip associated with a local time counter of a plurality of local time counters, a storage medium comprising computer-executable instructions for a method comprising:
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detecting an event associated with one of said plurality of chips; generating a timestamp with said local time counter at the time of the occurrence of said detected event, said timestamp being associated with said event; comparing said event and a normalized form of said timestamp with other events and associated normalized timestamps to determine an order of occurrence; providing a Time Base selected by said processor, said Time Base being a baseline time value; and transmitting a reset instruction from said processor to said plurality of local time counters associated with said plurality of chips, said plurality of local time counters resetting to a designated time so as to be synchronized with respect to each other; wherein the transmitting of the reset instruction is staggered so as to ensure that said resetting occurs simultaneously, said transmitting taking into account delays caused by network topology. - View Dependent Claims (7, 8, 9, 10)
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11. In an isochronous electronic device including at least one processor and a plurality of chips, each said chip associated with a local time counter of a plurality of local time counters, a method for determining a global ordering of events, said method comprising:
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detecting an event associated with one of said plurality of chips; generating a timestamp with said local time counter at the time of the occurrence of said detected event, said timestamp being associated with said event; comparing said event and a normalized form of said timestamp with other events and associated normalized timestamps to determine an order of occurrence; providing a Time Base selected by said processor, said Time Base being a baseline time value; determining an offset between the time indicated by said Time Base and the time indicated by each of said local time counters associated with said plurality of chips; transmitting each said offset for a local time counter to the chip with which the local time counter is associated; recording each offset associated with each said local time counter at a location accessible to the chip associated with the local time counter; and normalizing said timestamp using said offset associated with the local time counter prior to reporting said timestamp and said event to said processor. - View Dependent Claims (12, 13)
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14. In an electronic device including at least one processor and a plurality of chips, each said chip associated with a local time counter of a plurality of local time counters, a storage medium comprising computer-executable instructions for a method comprising:
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detecting an event associated with one of said plurality of chips; generating a timestamp with said local time counter at the time of the occurrence of said detected event, said timestamp being associated with said event; comparing said event and a normalized form of said timestamp with other events and associated normalized timestamps to determine an order of occurrence; providing a Time Base selected by said processor, said Time Base being a baseline time value; determining an offset between the time indicated by said Time Base and the time indicated by each of said local time counters associated with said plurality of chips; transmitting each said offset for a local time counter to the chip with which the local time counter is associated; recording each offset associated with each said local time counter at a location accessible to the chip associated with the local time counter; and normalizing said timestamp using said offset associated with the local time counter prior to reporting said timestamp and said event to said processor. - View Dependent Claims (15, 16)
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Specification