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Method of fabricating a high-voltage transistor with an extended drain structure

  • US 7,253,042 B2
  • Filed: 12/23/2004
  • Issued: 08/07/2007
  • Est. Priority Date: 09/07/2001
  • Status: Expired due to Fees
First Claim
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1. A method for fabricating a high-voltage transistor comprising:

  • forming, in a semiconductor substrate of a first conductivity type, first and second trenches that define a mesa having respective first and second sidewalls;

    partially filling each of the trenches with a dielectric material that covers the first and second sidewalls;

    filling a remaining portion of the trenches with a conductive material to form first and second field plates in the first and second trenches, respectively, the first and second field plates extending vertically from near a bottom of the mesa to a top surface of the semiconductor substrate;

    forming source and body regions in an upper portion of the mesa, the source region being of the first conductivity type and the body region being of a second conductivity type opposite to the first conductivity type, the body region separating the source from a lower portion of the mesa, the lower portion of the mesa comprising a drift region; and

    forming a gate embedded within the dielectric material adjacent the body region, the gate being insulated from the body region and the first and second field plates.

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