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Chip packaging structure having redistribution layer with recess

  • US 7,253,519 B2
  • Filed: 06/09/2004
  • Issued: 08/07/2007
  • Est. Priority Date: 06/09/2003
  • Status: Active Grant
First Claim
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1. A chip packaging structure, comprising:

  • a chip having a first passivation layer and at least a bonding pad, wherein the bonding pad is exposed by the first passivation layer and the first passivation layer has at least a recess, the whole recess has a sidewall and a bottom surface being exposed;

    a redistribution layer formed over the first passivation layer, wherein the redistribution layer electrically connects with the bonding pad and extends from the bonding pad to the recess, and in contact with the sidewall and the bottom surface of the recess and the redistribution layer further comprises;

    a first metallic layer formed over the first passivation layer, wherein a material constituting the first metallic layer is selected from the group consisting of aluminum, titanium, titanium-tungsten alloy, tantalum, tantalum nitride and chromium;

    a second metallic layer formed over the first metallic layer; and

    a third metallic layer formed over the second metallic layer;

    a second passivation layer formed over the first passivation layer and the redistribution layer, wherein the second passivation layer has an opening that exposes the redistribution layer above the recess; and

    at least a bump disposed inside the opening and electrically connected to the redistribution layer above the recess.

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