Method and related apparatus for deriving a tracking error signal

• US 7,254,099 B2
• Filed: 08/23/2006
• Issued: 08/07/2007
• Est. Priority Date: 04/07/2003
• Status: Active Grant

• Current Assignee: MediaTek, Inc.
• Original Assignee: MediaTek, Inc.
• Inventors: Cheng, Yuh
• Primary Examiner(s): Young; Wayne
• Assistant Examiner(s): HOFFNER, LINH NGUYEN
• Application Number:
  US11/466,458
• Publication Number:
  US 20070002711A1
• Time in Patent Office: 349 Days
• Field of Search: 369/44.25, 369/44.34
• US Class Current: 369/44.25
• CPC Class Codes: G11B 7/0906 Differential phase difference systems
• CPC Class Codes: G11B 7/0943 Methods and circuits for performing mathematical operations on individual detector segment outputs

Abstract

A method for deriving a tracking error signal based on a first analog detection signal and a second analog detection signal. The method includes summing the first analog detection signal and the second analog detection signal to generate an analog sum signal. An analog delay device is utilized to delay the analog sum signal to be a delay signal. The delay signal is digitalized into a digital delay signal. The first analog detection signal and the second analog detection signal are respectively transformed into a first digital detection signal and a second digital detect signal. The tracking error signal is then generated utilizing a comparing operation among the digital delay signal, the first digital detect signal, and the first digital detect signal.

Claims

1. A method for deriving a tracking error signal based on a first analog detection signal and a second analog detection signal, the method comprising:

summing the first analog detection signal and the second analog detection signal to generate an analog sum signal;

utilizing an analog delay device to delay the analog sum signal into a delay signal;

digitalizing the delay signal into a digital delay signal;

transforming the first analog detection signal and the second analog detection signal respectively into a first digital detection signal and a second digital detect signal;

respectively comparing the digital delay signal with the first digital detection signal and comparing the digital delay signal with the second digital detection signal to generate the tracking error signal;

providing a third analog detection signal and a fourth analog detection signal;

summing the first analog detection signal, the second analog detection signal, the third analog detection signal, and the fourth analog detection signal to generate an analog summing signal;

utilizing the analog delay device to delay the analog summing signal into a delay summing signal;

digitalizing the delay summing signal into a digital delay summing signal;

transforming the third analog detection signal and the fourth analog detection signal respectively into a third digital detection signal and a fourth digital detect signal; and

applying a plurality of comparing processes to the digital delay summing signal respectively with the first digital detect signal, the second digital detect signal, the third digital detect signal, and the fourth digital detection signal to generate the tracking error signal.

2. A method for deriving a tracking error signal in an optical storage system comprising:

(a) receiving an optical beam reflected and refracted via a recording carrier, the optical beam propagating along a track direction on the recording carrier according to the tracking error signal;

(b) after proceeding with step(a), according to a plurality of received different portions of the optical beam in space, generating a first analog detection signal and a second analog detection signal, wherein there is a time difference between the first analog detection signal and the second analog detection signal;

(c) after proceeding with step(b), respectively transforming the first analog detection signal and the second analog detection signal into a first digital detection signal and a second digital detect signal;

(d) after proceeding with step(b), summing the first analog detection signal and the second analog detection signal to generate an analog sum signal;

(e) after proceeding with step(d), applying a delay operation to the analog sum signal to be a delay signal;

(f) after proceeding with step(e), digitalizing the delay signal into a digital delay signal;

(g) after proceeding with step(e) and step(f), respectively comparing the digital delay signal with the first digital detection signal and comparing the digital delay signal with the second digital detection signal to generate the tracking error signal; and

(h) in step(b), according to the plurality of received portions of the optical beam, generating a third analog detection signal and a fourth analog detection signal;

(i) after proceeding with step(h), respectively applying the delay operation to the first analog detection signal and the third analog detection signal to generate a first delay detection signal and a third delay detect signal;

(j) after proceeding with step(i), respectively digitalizing the first delay detection signal and the third delay detection signal into a first digital delay detection signal and a third digital delay detect signal;

(k) after proceeding with step(h), respectively transforming the third analog detection signal and the fourth analog detection signal into a third digital detection signal and a fourth digital detect signal; and

(l) after proceeding with step(j) and step(k), applying a plurality of comparing processes to the first digital delay detect signal, the third digital delay detect signal, the first digital detect signal, the second digital detect signal, the third digital detect signal, and the fourth digital detection signal to generate the tracking error signal.

3. A tracking error signal generator comprising:

four signal processing ports for respectively providing a first analog detection signal, a second analog detection signal, a third analog detection signal, and a fourth analog detection signal;

a synthesizer electrically connected to the four signal processing ports for synthesizing the first analog detection signal, the second analog detection signal, the third analog detection signal, and the fourth analog detection signal into an analog summing signal;

an analog delay device electrically connected to the synthesizer for delaying and digitalizing the analog summing signal into a digital delay summing signal;

four digitizers respectively electrically connected to the four signal processing ports for respectively transforming the first analog detection signal, the second analog detection signal, the third analog detection signal, and the fourth analog detection signal into a first digital detect signal, a second digital detect signal, a third digital detect signal, and a fourth digital detect signal; and

a comparing module electrically connected to the analog delay device and the four digitizers for applying a comparing operation to the digital delay summing signal respectively with the first digital detect signal, the second digital detect signal, the third digital detect signal, and the fourth digital detection signal to generate the tracking error signal.

4. The tracking error signal generator of claim 3 wherein there is a time difference between the first analog detection signal, the second analog detection signal, the third analog detection signal, and the fourth analog detection signal.

5. The tracking error signal generator of claim 3 wherein the analog delay device is an equalizer electrically connected to a digitizer, or a relay.

6. The tracking error signal generator of claim 3 wherein the analog delay device is an equalizer electrically connected to a relay.