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On-chip inter-network performance optimization using configurable performance parameters

  • US 7,254,603 B2
  • Filed: 05/03/2002
  • Issued: 08/07/2007
  • Est. Priority Date: 05/03/2002
  • Status: Active Grant
First Claim
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1. An apparatus comprising:

  • a first configurable bridge agent of a first on-chip interconnect within a device, wherein the first configurable bridge agent has one or more ports including an interface port, and the first configurable bridge is coupled to a second configurable bridge agent of a second on-chip interconnect within the device via the interface port to allow a first inter-network communication between the first and second on-chip interconnects, wherein a first set of one or more target blocks and one or more initiator blocks within the device is communicatively coupled to the first on-chip interconnect, and a second set of one or more target blocks is communicatively coupled to the second on-chip interconnect, wherein the first configurable bridge agent is configured for inter-network performance enhancement by a parameter selected from the group consisting of performance enhance on/off, phase to phase delay, maximum request to data delay, minimum request to response delay, and maximum outstanding requests, wherein the first configurable bridge agent is configured at a point in time selected from the group consisting of at time of fabrication of the first configurable bridge agent, at a power up, at a reset, at an initialization prior to normal operation for the first configurable bridge agent, and dynamically during normal operation for the first configurable bridge agent.

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