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Programmable interconnect architecture for programmable logic devices

  • US 7,256,613 B1
  • Filed: 06/24/2005
  • Issued: 08/14/2007
  • Est. Priority Date: 06/24/2005
  • Status: Active Grant
First Claim
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1. A programmable logic device, comprising:

  • a plurality of programmable logic blocks arrayed in rows and columns, wherein each programmable logic block is coupled to a corresponding vertical routing resource and a corresponding horizontal routing resource, and wherein each vertical and horizontal routing resource includes a plurality of wires organized into wire groups and each programmable logic block has a set of inputs organized into input groups; and

    a plurality of connection boxes, each connection box corresponding to a programmable logic block and operable to couple a wire group to an input group, wherein a given wire group in one of the corresponding vertical and horizontal routing resources is couplable to a given input group independently of whether a given wire group in the remaining one of the corresponding vertical and horizontal routing resources is also couplable to the given input group.

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