Enhanced lithographic resolution through double exposure

• US 7,256,873 B2
• Filed: 01/28/2004
• Issued: 08/14/2007
• Est. Priority Date: 01/28/2004
• Status: Expired due to Fees

• Current Assignee: ASML Netherlands BV (ASML Holding NV)
• Original Assignee: ASML Netherlands BV (ASML Holding NV)
• Inventors: Hansen, Steven George, Finders, Jozef Maria, Flagello, Donis George
• Primary Examiner(s): Perkey; W. B.
• Assistant Examiner(s): GUTIERREZ, KEVIN C
• Application Number:
  US10/765,218
• Publication Number:
  US 20050162627A1
• Time in Patent Office: 1,294 Days
• Field of Search: 355/40, 355/53, 355/67, 355/77, 430/5, 430/30
• US Class Current: 355/77
• CPC Class Codes: G03F 7/70433 Layout for increasing efficiency or for compensating imaging errors, e.g. layout of exposure fields for reducing focus errors; Use of mask features for increasing efficiency or for compensating imaging errors
• CPC Class Codes: G03F 7/70466 Multiple exposures, e.g. combination of fine and coarse exposures, double patterning or multiple exposures for printing a single feature stitching G03F7/70475

Abstract

A system and method for enhancing the image resolution in a lithographic system, is presented herein. The invention comprises decomposing a reticle pattern into at least two constituent sub-patterns that are capable of being optically resolved by the lithographic system, coating a substrate with a pre-specified photoresist layer, and exposing a first of the at least two constituent sub-patterns by directing a projection beam through the first sub-pattern such that the lithographic system produces a first sub-pattern image onto the pre-specified photoresist layer of the substrate. The invention further comprises processing the exposed substrate, exposing a second of the at least two constituent sub-patterns by directing the projection beam through the second sub-pattern such that the lithographic system produces a second sub-pattern image onto the pre-specified photoresist layer of the substrate, and then combining the first and second sub-pattern images to produce a desired pattern on the substrate.

Claims

1. A device manufacturing method with a lithographic system, the method comprising:

providing a substrate coated with a photoresist layer having reduced memory reaction characteristics;

providing a beam radiation;

employing a patterning device to impart said beam of radiation with a pattern in its cross-section in which said pattern is decomposed into at least two constituent sub-patterns;

exposing a first of said at least two constituent sub-patterns by directing said beam of radiation beam through said first sub-pattern such that said lithographic system produces a first sub-pattern image onto a target area of said pre-specified photoresist layer of said substrate;

processing said exposed substrate;

exposing a second of said at least two constituent sub-patterns by directing said beam of radiation through said second sub-pattern such that said lithographic system produces a second sub-pattern image onto said target area of said pre-specified photoresist layer of said substrate,

wherein said exposing of the first of said at least two constituent sub-patterns and said exposing of the second of said at least two constituent sub-patterns combine said first and second sub-pattern images to produce a desired pattern on said target area of said substrate.

2. The device manufacturing method of claim 1, wherein a combination of said exposing of the first of said at least two constituent sub-patterns and said exposing of the second of said at least two constituent sub-patterns produce features in said desired pattern that correspond to a half-pitch lower limit k₁ less than or equal to 0.25.

3. The device manufacturing method of claim 1, wherein said processing includes,

baking said substrate having said first sub-pattern image on said photoresist layer.

4. The device manufacturing method of claim 3, further including applying a developer solution to said substrate.

5. The device manufacturing method of claim 4, wherein said processing is optimized by employing specific bake times and temperatures such that said desired pattern includes features that correspond to a half-pitch lower limit k₁ less than or equal to 0.25.

6. The device manufacturing method of claim 1, wherein said photoresist layer further comprises a polymer resin compound, a photo-acid generator component, and a base component.

7. The device manufacturing method of claim 3, wherein said processing further includes,

applying a developer solution to said substrate, and

shifting said substrate by a predetermined distance, in order to combine said second sub-pattern image with said first sub-pattern image.

8. The device manufacturing method of claim 7, further including baking said substrate having said second sub-pattern image and a developed first sub-pattern image on said photoresist layer.

9. The device manufacturing method of claim 8, wherein said wherein said processing is optimized by employing specific bake times and temperatures such that said desired pattern includes features that correspond to a half-pitch lower limit k₁ less than or equal to 0.25.

10. The device manufacturing method of claim 9, wherein said photoresist layer further comprises a polymer resin compound, a photo-acid generator component, and a base component.

11. The method of claim 3, further comprising shifting said substrate before exposing the second of said at least two constituent sub-patterns by a predetermined distance in order to interleave said second sub-pattern image with said first sub-pattern image.