Methods of forming thin-film transistor display devices

• US 7,259,035 B2
• Filed: 02/24/2005
• Issued: 08/21/2007
• Est. Priority Date: 02/29/1996
• Status: Expired due to Fees

• Current Assignee: Samsung Electronics Co. Ltd.
• Original Assignee: Samsung Electronics Co. Ltd.
• Inventors: Kim, Dong-gyu
• Primary Examiner(s): Pert; Evan
• Assistant Examiner(s): MANDALA, VICTOR A
• Application Number:
  US11/064,919
• Publication Number:
  US 20050158926A1
• Time in Patent Office: 908 Days
• Field of Search: 257/E27.131, 438/34, 438/66
• US Class Current: 438/34
• CPC Class Codes: G02F 1/13458 Terminal pads
• CPC Class Codes: G02F 1/136227 Through-hole connection of the pixel electrode to the active element through an insulation layer
• CPC Class Codes: G02F 1/136286 Wiring, e.g. gate line, drain line
• CPC Class Codes: G02F 1/13629 Multilayer wirings
• CPC Class Codes: H01L 27/12 the substrate being other than a semiconductor body, e.g. an insulating body
• CPC Class Codes: H01L 27/124 with a particular composition, shape or layout of the wiring layers specially adapted to the circuit arrangement, e.g. scanning lines in LCD pixel circuits wiring structures per se H01L23/52
• CPC Class Codes: H01L 29/41733 for thin film transistors with insulated gate
• CPC Class Codes: H01L 29/458 for thin film silicon, e.g. source or drain electrode
• CPC Class Codes: H01L 29/66765 Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate

Abstract

Methods of forming thin-film transistor display devices including forming a gate line and a gate electrode on a face of a substrate and forming a semiconductor layer that is insulated from the gate line. A data line and a source/drain electrode are formed on the semiconductor layer. The data line and the source/drain electrode are formed as composites of at least two different metal conductive layers. A transparent pixel electrode is formed that is electrically coupled to the drain electrode.

Claims

1. A method of forming thin-film transistor display device, comprising the steps of:

forming a gate line and a gate electrode on a substrate;

forming a gate insulating layer on the gate line and the gate electrode;

forming a semiconductor layer on the gate insulating layer;

forming a data line including a source electrode and a drain electrode on the semiconductor layer, the data line including the source electrode and the drain electrode comprising a composite of a lower layer of a first metal and an upper layer of a second metal different from the first metal;

forming a pixel electrode electrically coupled to the drain electrode;

forming a gate pad electrically connected to an end portion of the gate line; and

forming a data pad that is electrically connected to an end portion of the data line and contacts an upper surface of the lower layer.

2. The method of claim 1, wherein the pixel electrode, the gate pad and the data pad are made of the same material.

3. The method of claim 1, wherein the gate electrode comprises at least two layers including two metals of a different element therein.

4. The method of claim 3, wherein the gate electrode has a lower layer containing a refractory metal selected from the group comprising chromium, molybdenum, titanium and tantalum and an upper layer containing aluminum on the lower layer of the gate electrode.

5. The method of claim 3, further comprising:

etching the upper layer to expose the lower layer.

6. The method of claim 1, wherein the lower layer contains a refractory metal selected from the group comprising chromium, molybdenum, titanium and tantalum and the upper layer contains aluminum.

7. The method of claim 6, further comprising:

etching the upper layer to expose the lower layer.

8. The method of claim 7, wherein the pixel electrode contacts the lower layer.

9. The method of claim 1, wherein the gate pad contacts a side surface of the gate line.

10. The method of claim 1, wherein the data pad contacts a side surface of the data line.

11. The method of claim 1, wherein forming the pixel electrode is preceded by:

forming a passivation layer on the data line; and

forming a first contact hole and a second contact hole in the passivation layer;

wherein the first contact hole exposes a lower layer of the drain electrode and the second contact hole exposes a lower layer of the end portion of the data line;

wherein the pixel electrode is formed on the passivation layer and contacts the exposed lower layer of the drain electrode; and

wherein the data pad is formed on the passivation layer and contacts the exposed lower layer of the end portion of the data line.

12. The method of claim 11, wherein each of the gate electrode and the gate line comprises a lower electrode containing a refractory metal and an upper electrode containing aluminum.

13. The method of claim 12, further comprising forming a third contact hole in the passivation layer, wherein the third contact hole exposes the lower electrode of an end portion of the gate line.

14. The method of claim 13, wherein the gate pad is formed on the passivation layer and contacts the exposed lower electrode of the end portion of the gate line.

15. A method of forming thin-film transistor display device, comprising the steps of:

forming a gate electrode on the substrate;

forming a gate insulating layer on the gate electrode;

forming a semiconductor layer on the gate insulating layer;

forming a data line comprising a lower layer of a first metal and an upper layer of a second metal different from the first metal concurrently with forming a source electrode comprising a lower layer of a first metal and an upper layer of the second metal on a first portion of the semiconductor layer;

forming a drain electrode comprising a lower layer of the first metal and an upper layer of the second metal, on a second portion of the semiconductor layer;

forming a pixel electrode that is electrically coupled to the drain electrode and contacts an upper surface of the lower layer of the drain electrode; and

forming a data pad that is electrically connected to an end portion of the data line and contacts an upper surface of the lower layer of the data line.