Multiple-gate device with floating back gate
First Claim
1. A multiple-gate transistor comprising:
- a channel region;
a logic gate comprising a conductor adjacent a first side of said channel region;
a floating gate comprising a conductor adjacent a second side of said channel region, wherein said first side is opposite said second side such that said channel region is between said first side and said second side, and wherein said channel region is between said floating gate and said logic gate; and
a programming gate comprising a conductor adjacent said floating gate, wherein said floating gate is between said programming gate and said channel region,wherein said logic gate performs a different function than said floating gate, wherein said logic gate performs a different function than said programming gate, and wherein said floating gate performs a different function than said programming gate.
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Abstract
Disclosed is a multiple-gate transistor that includes a channel region and source and drain regions at ends of the channel region. A gate oxide is positioned between a logic gate and the channel region and a first insulator is formed between a floating gate and the channel region. The first insulator is thicker than the gate oxide. The floating gate is electrically insulated from other structures. Also, a second insulator is positioned between a programming gate and the floating gate. Voltage in the logic gate causes the transistor to switch on and off, while stored charge in the floating gate adjusts the threshold voltage of the transistor. The transistor can comprise a fin-type field effect transistor (FinFET), where the channel region comprises the middle portion of a fin structure and the source and drain regions comprise end portions of the fin structure.
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Citations
21 Claims
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1. A multiple-gate transistor comprising:
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a channel region; a logic gate comprising a conductor adjacent a first side of said channel region; a floating gate comprising a conductor adjacent a second side of said channel region, wherein said first side is opposite said second side such that said channel region is between said first side and said second side, and wherein said channel region is between said floating gate and said logic gate; and a programming gate comprising a conductor adjacent said floating gate, wherein said floating gate is between said programming gate and said channel region, wherein said logic gate performs a different function than said floating gate, wherein said logic gate performs a different function than said programming gate, and wherein said floating gate performs a different function than said programming gate. - View Dependent Claims (2, 3, 4, 5, 6, 7)
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8. A multiple-gate transistor comprising:
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a channel region; source and drain regions at ends of said channel region; a gate oxide on a first side of said channel region; a logic gate comprising a conductor adjacent said first gate oxide, wherein said gate oxide is between said logic gate and said channel region, and wherein voltage in said logic gate causes said transistor to switch on and off; a first insulator on a second side of said channel region, wherein said second side of said channel region is opposite said first side such that said channel region is between said first side and said second side; a floating gate comprising a conductor adjacent said first insulator, wherein said first insulator is between said floating gate and said channel region, wherein said channel region is between said floating gate and said logic gate, and wherein charge in said floating gate adjusts the threshold voltage of said transistor; a second insulator adjacent said floating gate; and a programming gate comprising a conductor adjacent said second insulator, wherein said second insulator is between said programming gate and said floating gate, wherein a voltage change of said programming gate changes a voltage of said floating gate, wherein said logic gate performs a different function than said floating gate, wherein said logic gate performs a different function than said programming gate, and wherein said floating gate performs a different function than said programming gate. - View Dependent Claims (9, 10, 11, 12)
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13. A multiple-gate transistor comprising:
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a channel region; a logic gate comprising a conductor adjacent a first side of said channel region, wherein voltage in said logic gate causes said transistor to switch on and off; a floating gate comprising a conductor adjacent a second side of said channel region, wherein said first side is opposite said second side such that said channel region is between said first side and said second side, wherein said channel region is between said floating gate and said logic gate, and wherein charge in said floating gate adjusts the threshold voltage of said transistor; and a programming gate comprising a conductor adjacent said floating gate, wherein said floating gate is between said programming gate and said channel region. - View Dependent Claims (14, 15, 16, 17)
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18. A multiple-gate transistor comprising:
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a channel region; a logic gate comprising a conductor adjacent a first side of said channel region, wherein voltage in said logic gate causes said transistor to switch on and off, and wherein said transistor comprises a fin-type field effect transistor (FinFET); a floating gate comprising a conductor adjacent a second side of said channel region, wherein said first side is opposite said second side such that said channel region is between said first side and said second side, wherein said channel region is between said floating gate and said logic gate, and wherein charge in said floating gate adjusts the threshold voltage of said transistor; and a programming gate comprising a conductor adjacent said floating gate, wherein said floating gate is between said programming gate and said channel region. - View Dependent Claims (19, 20, 21)
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Specification