Method and apparatus for detecting impedance

• US 7,259,572 B2
• Filed: 06/14/2005
• Issued: 08/21/2007
• Est. Priority Date: 06/14/2004
• Status: Active Grant

• Current Assignee: Powerprecise Solutions
• Original Assignee: Powerprecise Solutions
• Inventors: Houldsworth, John, Jones, Nigel A.
• Primary Examiner(s): DEB, ANJAN K
• Application Number:
  US11/151,222
• Publication Number:
  US 20050275408A1
• Time in Patent Office: 798 Days
• Field of Search: 324/677, 324/711, 324/427, 324/435, 324/428, 324/430, 324/525, 320/132
• US Class Current: 324/677
• CPC Class Codes: G01R 31/3648 comprising digital calculation means, e.g. for performing an algorithm
• CPC Class Codes: G01R 31/382 Arrangements for monitoring battery or accumulator variables, e.g. SoC
• CPC Class Codes: G01R 31/389 Measuring internal impedance, internal conductance or related variables
• CPC Class Codes: H02J 7/0047 with monitoring or indicating devices or circuits
• CPC Class Codes: H02J 7/0048 Detection of remaining charge capacity or state of charge [SOC]

Abstract

A method and apparatus for detecting an impedance across a pair of terminals. A sensing circuit is AC coupled to the terminals which produces an output related to a time constant associated with the impedance.

Claims

1. A method of detecting impedance across a pair of terminals comprising:

AC coupling a sensing circuit to said pair of terminals, said sensing circuit producing an output related to a time constant associated with an impedance; and

monitoring said sensing circuit output to determine said impedance.

2. The method of claim 1, wherein said sensing circuit output is monitored at a pre-selected time interval for comparison to a threshold to determine said time constant.

3. The method of claim 1, wherein said sensing circuit includes a CMOS logic device.

4. The method of claim 3, wherein one logic connection connects the CMOS logic device to a remainder of said sensing circuit.

5. The method of claim 1, wherein said sensing circuit is coupled to a battery pack;

and said method further comprises;

controlling an operating state of a state-of-charge monitor based on said monitoring.

6. The method of claim 5, wherein said battery pack includes a plurality of cell strings and when said plurality of cell strings are electrically independent, said sensing circuit produces first output.

7. The method of claim 6, wherein the current draw of said state-of-charge monitor is between 0 and about 10 μ

A when said sensing circuit produces said first output.

8. The method of claim 6, wherein said controlling further comprises activating said the state-of-charge monitor when said sensing circuit produces a second output.

9. The method of claim 8, wherein when said plurality of cell strings are electrically attached in series, said sensing circuit produces said second output.

10. The method of claim 8, wherein when said plurality of cell strings are electrically attached in parallel, said sensing circuit produces said second output.

11. The method of claim 5, further comprising indicating the state-of-charge level of said battery pack on a display.

12. The method of claim 11, wherein said display comprises a multiple bar indicator.

13. The method of claim 5, wherein said sensing circuit is contained within said state-of-charge monitor.

14. Apparatus for detecting an impedance across a pair of terminals comprising:

a sensing circuit AC coupled to said terminals which produces an output related a to a time constant associated with said impedance.

15. The apparatus of claim 14 wherein said sensing circuit includes a CMOS logic device.

16. The apparatus of claim 15 wherein one logic connection connects said CMOS logic device to a remainder of said sensing circuit.

17. The apparatus of claim 14, further comprising:

a state-of-charge detector having a plurality of operating states;

wherein

said sensing circuit is associated with a battery pack, produces an output based at least in part on whether said battery pack is connected to a load, and controls said operating states based on said sensing circuit output.

18. The state-of-charge monitor of claim 17, wherein said battery pack includes a plurality of cell strings and said sensing circuit is electrically attached to at least one or said plurality of cell strings.

19. The state-of-charge monitor in claim 17, wherein the current draw of said state-of-charge detector in a dormant mode is between 0 and about 10 μ

A.

20. A battery management system comprising:

a battery pack having a plurality of cell strings;

a state-of-charge monitor electrically attached to said battery pack and having a plurality of operating states; and

a sensing circuit AC coupled to at least one of said plurality of cell strings which produces an output related to a time constant associated with an impedance between said plurality of cell strings, and controls said operating states based on said sensing circuit output.

21. The battery management system of claim 20, wherein when said plurality of cell strings are electrically independent, said sensing circuit produces a first output.

22. The battery management system of claim 21, wherein the current draw of said state-of charge monitor when said sensing circuit produces said first output is between 0 and about 10 μ

A.

23. The battery management system of claim 21, wherein said state-of-charge monitor is activated when said sensing circuit produces a second output.

24. The battery management system of claim 23, wherein when said plurality of cell strings are electrically attached in series, said sensing circuit produces said second output.

25. The battery management system of claim 23, wherein when said plurality of cell strings are electrically attached in parallel, said sensing circuit produces said second output.

26. The battery management system of claim 20, wherein said sensing circuit output is monitored at a pre-selected time interval for comparison to a threshold to determine said time constant.

29. The battery management system of claim 20, wherein said sensing circuit is integrated within said state-of-charge monitor.

30. The battery management system of claim 20, wherein said sensing circuit includes a CMOS logic device.

31. The battery management system of claim 30, wherein one logic connection connects the CMOS logic device to said battery pack.

27. The battery management system of Saint 20, further comprising a display for indicating the state-of-charge level of said battery pack to a user.

28. The battery management system of claim 27, wherein said display comprises a multiple bar indicator.