Optically blocked reference pixels for focal plane arrays

• US 7,262,412 B2
• Filed: 05/31/2005
• Issued: 08/28/2007
• Est. Priority Date: 12/10/2004
• Status: Active Grant

• Current Assignee: DRS Network & Imaging Systems, LLC (Leonardo S.p.A.)
• Original Assignee: L-3 Communications Corporation (L3Harris Technologies, Inc.)
• Inventors: Gooch, Roland W., Syllaios, Athanasios J., Schimert, Thomas R., McCardel, William L.
• Primary Examiner(s): Luu; Thanh X.
• Assistant Examiner(s): ELLIS, SUEZU Y
• Application Number:
  US11/141,356
• Publication Number:
  US 20060124831A1
• Time in Patent Office: 819 Days
• Field of Search: 250/208.1, 250/208.2, 250/214.R, 250/214.1, 250/214.B, 250/239, 250/339.02, 250/338.3, 250/332, 250/339.05, 257431-433, 257/435, 257/294, 257/678, 257/704
• US Class Current: 250/338.1
• CPC Class Codes: G01J 2005/065 by shielding
• CPC Class Codes: G01J 2005/066 Differential arrangement, i.e. sensitive/not sensitive
• CPC Class Codes: G01J 5/064 Ambient temperature sensor; Housing temperature sensor; Constructional details thereof
• CPC Class Codes: G01J 5/20 using resistors, thermistors or semiconductors sensitive to radiation, e.g. photoconductive devices
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05669 Platinum [Pt] as principal constituent
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 24/05 of an individual bonding area
• CPC Class Codes: H01L 27/14618 Containers
• CPC Class Codes: H01L 27/14623 Optical shielding
• CPC Class Codes: H01L 27/1463 Pixel isolation structures
• CPC Class Codes: H01L 27/14634 Assemblies, i.e. Hybrid structures
• CPC Class Codes: H01L 27/1465 of the hybrid type
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/1461 MEMS

Abstract

Methods for making optically blind reference pixels and systems employing the same. The reference pixels may be configured to be identical to, or substantially identical to, the active detector elements of a focal plane array assembly. The reference pixels may be configured to use the same relatively longer thermal isolation legs as the active detector pixels of the focal plane, thus eliminating joule heating differences. An optically blocking structure may be placed in close proximity directly over the reference pixels.

Claims

1. A focal plane array package assembly, comprising:

at least one active infrared detector pixel element;

at least one infrared reference pixel element;

an optically blocking structure disposed in spaced relationship with said at least one infrared reference pixel element to completely block infrared radiation from reaching said infrared reference pixel element; and

a package assembly lid overlying said at least one active infrared detector pixel element and said at least one infrared reference pixel element;

said package assembly lid comprising said optically blocking structure;

wherein said at least one active infrared detector pixel element has thermal isolation legs;

wherein said at least one infrared reference pixel element has thermal isolation legs; and

wherein a length of said thermal isolation legs of said at least one infrared reference pixel element is substantially the same as the length of said thermal isolation legs of said at least one active infrared detector pixel element.

2. The focal plane array package assembly of claim 1, wherein said focal plane array package assembly comprises a vacuum package assembly;

and wherein said package assembly lid comprises a vacuum package lid.

3. The focal plane array package assembly of claim 1, wherein said optically blocking structure comprises an optically blocking surface.

4. The focal plane array package assembly of claim 1, said focal plane array package assembly comprising at least one array of active infrared detector pixel elements;

and at least one array of infrared reference pixel elements;

wherein said at least one array of infrared reference pixel elements is optically blocked by said optically blocking structure.

5. The focal plane array package assembly of claim 1, wherein said at least one infrared reference pixel is identical in configuration to said at least one active infrared detector pixel element.

6. The focal plane array package assembly of claim 1, wherein said optically blocking structure is non-optically transmissive.

7. The focal plane array package assembly of claim 1 wherein each of said at least one active infrared detector pixel element and said at least one infrared reference pixel element comprises a microbolometer detector pixel element.

8. A focal plane array package assembly, comprising:

at least one active infrared detector pixel element;

at least one infrared reference pixel element;

an optically blocking structure disposed in spaced relationship with said at least one infrared reference pixel element to completely block infrared radiation from reaching said infrared reference pixel; and

a package assembly lid overlying said at least one active infrared detector pixel element and said at least one infrared reference pixel element;

said package assembly lid comprising said optically blocking structure;

wherein said optically blocking structure comprises an inner surface of said package assembly lid;

wherein said package assembly lid is configured to transmit incident light in a first direction to said at least one active detector pixel element; and

wherein said inner surface of said package assembly lid is configured to have an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle.

9. A focal plane array assembly, comprising:

a device wafer die element, said device wafer die element comprising at least one active infrared detector pixel element array and at least one infrared reference pixel element array disposed on a first surface thereof; and

a lid wafer element, said lid wafer element having a first surface disposed in relationship to said first surface of said device wafer die element such that said first surface of said lid wafer element overlies said at least one active infrared detector pixel element array and said at least one infrared reference pixel element array;

wherein said lid wafer element is configured to completely block infrared radiation from reaching said at least one infrared reference pixel element array; and

wherein each pixel element of said at least one active infrared detector pixel element array has thermal isolation legs;

wherein each pixel element of said at least one infrared reference pixel array has thermal isolation legs; and

wherein a length of said thermal isolation legs of each pixel element of said infrared reference pixel array is substantially the same as the length of said thermal isolation legs of pixel element of said active infrared detector pixel array.

10. The focal plane array assembly of claim 9, wherein said lid wafer element is configured with an optically blocking structure to optically block said at least one infrared reference pixel element array.

11. The focal plane array assembly of claim 10, wherein said optically blocking structure comprises an optically blocking surface disposed on said first surface of said lid wafer element.

12. The focal plane array assembly of claim 11, wherein said optically blocking surface comprises a reflective layer.

13. The focal plane array assembly of claim 9, wherein pixel elements of said at least one infrared reference pixel element array are identical in configuration to pixel elements of said at least one active infrared detector pixel element array.

14. The focal plane array assembly of claim 9, wherein said lid wafer element is configured to be non-optically transmissive over said infrared reference pixel element array so as to completely block infrared radiation from reaching said at least one infrared reference pixel element array.

15. The focal plane array assembly of claim 9, wherein each of said at least one active infrared detector pixel element array and said at least one infrared reference pixel element array comprises microbolometer detector pixel elements.

16. A focal plane array assembly, comprising:

a device wafer die element, said device wafer die element comprising at least one active infrared detector pixel element array and at least one infrared reference pixel element array disposed on a first surface thereof; and

a lid wafer element, said lid wafer element having a first surface disposed in relationship to said first surface of said device wafer die element such that said first surface of said lid wafer element overlies said at least one active infrared detector pixel element array and said at least one infrared reference pixel element array;

wherein said lid wafer element is configured to completely block infrared radiation from reaching said at least one infrared reference pixel element array;

wherein said lid wafer element is configured with an optically blocking structure to optically block said at least one infrared reference pixel element array; and

wherein said lid wafer element is configured to transmit incident light in a first direction to said at least one active infrared detector pixel element array; and

wherein said optically blocking structure comprises a portion of said first surface of said assembly lid that is configured to have an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle.

17. The focal plane array assembly of claim 16, wherein a cavity is defined by said first surface of said lid wafer element, said cavity overlying said at least one infrared reference pixel array;

and wherein a wall of said cavity comprises said portion of said first surface of said lid wafer element that is configured to have an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle.

18. A method of making a focal plane array assembly, comprising:

providing at least one active infrared detector pixel and at least one infrared reference pixel on a first surface of a device wafer; and

disposing a lid wafer in relationship to said device wafer, said lid wafer comprising an optically blocking structure disposed in a spaced relationship to said at least one infrared reference pixel of said device wafer to completely block infrared radiation from reaching said at least one infrared reference pixel;

wherein said at least one active infrared detector pixel has thermal isolation legs;

wherein said at least one infrared reference pixel has thermal isolation legs; and

wherein a length of said thermal isolation legs of said at least one infrared reference pixel is substantially the same as the length of said thermal isolation legs of said at least one active infrared detector pixel.

19. The method of claim 18, wherein said method further comprises:

forming at least one active infrared detector pixel array and at least one infrared reference pixel array on said first surface of said device wafer; and

disposing a first surface of said lid wafer in relationship to said first surface of said device wafer such that said first surface of said lid wafer overlies said at least one active infrared detector pixel-array and said at least one infrared reference pixel array;

wherein said lid wafer is disposed in relationship to said first surface of said device wafer so that said optically blocking structure is in a position to optically block said at least one infrared reference pixel array.

20. The method of claim 19, further comprising forming said optically blocking structure on said first surface of said lid wafer, said optically blocking structure comprising an optically blocking surface.

21. The method of claim 20, wherein said optically blocking surface comprises a reflective layer.

22. The method of claim 19, further comprising bonding said lid wafer to said device wafer to form a bonded wafer pair;

and then segmenting said bonded wafer pair to form a single die assembly comprising at least one active infrared detector pixel array and at least one infrared reference pixel array with an optically blocking structure in a position to optically block said at least one infrared reference pixel array of said single die assembly.

23. The method of claim 18, wherein said at least one infrared reference pixel is identical in configuration to said at least one active infrared detector pixel.

24. The method of claim 18, wherein said optically blocking structure is non-optically transmissive.

25. The method of claim 18, wherein each of said at least one active infrared detector pixel and said at least one infrared reference pixel comprises a microbolometer detector pixel.

26. A method of making a focal plane array assembly, comprising:

providing at least one active infrared detector pixel and at least one infrared reference pixel on a first surface of a device wafer; and

disposing a lid wafer in relationship to said device wafer, said lid wafer comprising an optically blocking structure disposed in a spaced relationship to said at least one infrared reference pixel of said device wafer to completely block infrared radiation from reaching said at least one infrared reference pixel;

wherein said method further comprises forming at least one active infrared detector pixel array and at least one infrared reference pixel array on said first surface of said device wafer;

wherein said method further comprises disposing a first surface of said lid wafer in relationship to said first surface of said device wafer such that said first surface of said lid wafer overlies said at least one active infrared detector pixel-array and said at least one infrared reference pixel array;

wherein said lid wafer is disposed in relationship to said first surface of said device wafer so that said optically blocking structure is in a position to optically block said at least one infrared reference pixel array; and

wherein said method further comprises forming said optically blocking structure on said first surface of said lid wafer by forming a portion of said first surface of said lid wafer to have an angle θ

relative to the direction of incident light that is greater than or equal to the critical angle.

27. The method of claim 26, further comprising forming a cavity in said first surface of said lid wafer, said cavity overlying said at least one infrared reference pixel array;

wherein said lid wafer is configured to transmit incident light in a first direction to said at least one active infrared detector pixel array; and

wherein a wall of said cavity comprises said portion of said first surface of said lid wafer having an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle.

28. A focal plane array package assembly, comprising:

at least one active detector pixel element;

at least one reference pixel element;

an optically blocking structure disposed in spaced relationship with said at least one reference pixel element to at least partially optically block said reference pixel element; and

a package assembly lid overlying said at least one active detector pixel element and said at least one reference pixel element;

said package assembly lid comprising said optically blocking structure;

wherein said at least one active detector pixel element has thermal isolation legs;

wherein said at least one reference pixel element has thermal isolation legs; and

wherein a length of said thermal isolation legs of said at least one reference pixel element is substantially the same as the length of said thermal isolation legs of said at least one active detector pixel element.

29. The focal plane array package assembly of claim 28,

wherein said focal plane array package assembly comprises a vacuum package assembly;

and wherein said package assembly lid comprises a vacuum package lid.

30. The focal plane array package assembly of claim 28, wherein said optically blocking structure is disposed in spaced relationship at a distance of from about 10 microns to about 25 microns to said at least one reference pixel element.

31. The focal plane array package assembly of claim 28, wherein said package assembly lid comprises a raised inner surface extending above said at least one active detector pixel element to form a cavity overlying said at least one active detector pixel element, said cavity not extending over said at least one reference pixel element;

and wherein said package assembly lid comprises a stepped down inner surface extending above said at least one reference pixel element, said stepped down inner surface supporting said optically blocking structure over said at least one reference pixel element.

32. The focal plane array package assembly of claim 28, wherein said package assembly lid comprises a substantially planar inner surface extending across and above said at least one active detector pixel element and said at least one reference pixel element, said substantially planar inner surface supporting said optically blocking structure over said at least one reference pixel element.

33. A focal plane array assembly, comprising:

a device wafer die element, said device wafer die element comprising at least one active detector pixel element array and at least one reference pixel array disposed on a first surface thereof; and

a lid wafer element, said lid wafer element having a first surface disposed in relationship to said first surface of said device wafer die element such that said first surface of said lid wafer element overlies said at least one active detector pixel element array and said at least one reference pixel element array;

wherein said lid wafer element is configured to optically block said at least one reference pixel element array;

wherein said lid wafer element is configured with an optically blocking structure to optically block said at least one reference pixel element array;

wherein said lid wafer element is configured to transmit incident light in a first direction to said at least one active detector pixel element array; and

wherein said optically blocking structure comprises a portion of said first surface of said assembly lid that is configured to have an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle; and

wherein a cavity is defined by said first surface of said lid wafer element, said cavity overlying said at least one reference pixel array; and

wherein a wall of said cavity comprises said portion of said first surface of said lid wafer element that is configured to have an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle.

34. A focal plane array assembly, comprising:

a device wafer die element, said device wafer die element comprising at least one active detector pixel element array and at least one reference pixel element array disposed on a first surface thereof; and

a lid wafer element, said lid wafer element having a first surface disposed in relationship to said first surface of said device wafer die element such that said first surface of said lid wafer element overlies said at least one active detector pixel element array and said at least one reference pixel element array;

wherein said lid wafer element is configured to optically block said at least one reference pixel element array;

wherein each pixel element of said at least one active detector pixel element array has thermal isolation legs;

wherein each pixel element of said at least one reference pixel array has thermal isolation legs; and

wherein a length of said thermal isolation legs of each pixel element of said reference pixel array is substantially the same as the length of said thermal isolation legs of each pixel element of said active detector pixel element array.

35. The focal plane array assembly of claim 34, wherein said lid wafer element is configured with an optically blocking structure to optically block said at least one reference pixel element array;

and wherein said optically blocking structure is disposed in spaced relationship at a distance of from about 10 microns to about 25 microns to said at least one reference pixel element array.

36. The focal plane array assembly of claim 34, wherein said first surface of said lid wafer element comprises a raised inner surface extending above said at least one active detector pixel element array to form a cavity overlying said at least one active detector pixel element array, said cavity not extending over said at least one reference pixel element array;

and wherein said lid wafer element comprises a stepped down inner surface extending above said at least one reference pixel element array, said stepped down inner surface supporting an optically blocking structure over said at least one reference pixel element array.

37. The focal plane array assembly of claim 34, wherein said first surface of said lid wafer element comprises a substantially planar inner surface extending across and above said at least one active detector pixel element array and said at least one reference pixel element array, said substantially planar inner surface supporting an optically blocking structure over said at least one reference pixel element array.

38. A method of making a focal plane array assembly, comprising:

providing at least one active detector pixel and at least one reference pixel on a first surface of a device wafer;

disposing a lid wafer in relationship to said device wafer, said lid wafer comprising an optically blocking structure disposed in a spaced relationship to said at least one reference pixel of said device wafer;

forming at least one active detector pixel array and at least one reference pixel array on said first surface of said device wafer;

disposing a first surface of said lid wafer in relationship to said first surface of said device wafer such that said first surface of said lid wafer overlies said at least one active detector pixel array and said at least one reference pixel array, and

wherein said lid wafer is disposed in relationship to said first surface of said device wafer so that said optically blocking structure is in a position to optically block said at least one reference pixel array;

wherein said method further comprises forming said optically blocking structure on said first surface of said lid wafer by forming a portion of said first surface of said lid wafer to have an angle θ

relative to the direction of incident light that is greater than or equal to the critical angle; and

wherein said method further comprises forming a cavity in said first surface of said lid wafer, said cavity overlying said at least one reference pixel array;

wherein said lid wafer is configured to transmit incident light in a first direction to said at least one active detector pixel array; and

wherein a wall of said cavity comprises said portion of said first surface of said lid wafer having an angle θ

relative to said first direction of incident light that is greater than or equal to the critical angle.

39. A method of making a focal plane array assembly, comprising:

providing at least one active detector pixel and at least one reference pixel on a first surface of a device wafer; and

disposing a lid wafer in relationship to said device wafer, said lid wafer comprising an optically blocking structure disposed in a spaced relationship to said at least one reference pixel of said device wafer;

wherein said at least one active detector pixel has thermal isolation legs;

wherein said at least one reference pixel has thermal isolation legs; and

wherein a length of said thermal isolation legs of said at least one reference pixel is substantially the same as the length of said thermal isolation legs of said at least one active detector pixel.

40. The method of claim 39, further comprising disposing said lid wafer in relationship to said device wafer such that said optically blocking structure is disposed in spaced relationship at a distance of from about 10 microns to about 25 microns to said at least one reference pixel.

41. The method of claim 39, wherein said lid wafer comprises a raised inner surface, and wherein said method further comprises disposing said lid wafer in relationship to said device wafer such that said raised inner surface extends above said at least one active detector pixel to form a cavity overlying said at least one active detector pixel, and such that said cavity does not extend over said at least one reference pixel;

and wherein said lid wafer further comprises a stepped down inner surface supporting said optically blocking structure, and wherein said method further comprises disposing said lid wafer in relationship to said device wafer such that said stepped down inner surface extends above said at least one reference pixel and such that said stepped down inner surface supports said optically blocking structure over said at least one reference pixel.

42. The method of claim 39, wherein said lid wafer comprises a substantially planar inner surface supporting said optically blocking structure;

and wherein said method further comprises disposing said lid wafer in relationship to said device wafer such that said substantially planar inner surface extends across and above said at least one active detector pixel and said at least one reference pixel and such that said substantially planar inner surface supports said optically blocking structure over said at least one reference pixel.

43. A focal plane array package assembly, comprising:

at least one first pixel element, said first pixel element comprising an active detector pixel element; and

at least one second pixel element;

an optically blocking structure disposed in spaced relationship with said second pixel element, said optically blocking structure being configured to optically block said second pixel element to form an optically blind reference pixel that is optically non-responsive; and

a package assembly lid overlying said first pixel element and said second pixel element;

said package assembly lid comprising said optically blocking structure;

wherein said at least one first pixel element has thermal isolation legs;

wherein said at least one second pixel element has thermal isolation legs; and

wherein a length of said thermal isolation legs of said at least one second pixel element is substantially the same as the length of said thermal isolation legs of said at least one first pixel element.

44. The focal plane array package assembly of claim 43, wherein said focal plane array assembly comprises an infrared focal plane array assembly.

45. A focal plane array assembly, comprising:

a device wafer die element, said device wafer die element comprising at least one array of first pixel elements and at least one array of second pixel elements disposed on a first surface thereof, said array of first pixel elements comprising active detector pixel elements; and

a lid wafer element, said lid wafer element having a first surface disposed in relationship to said first surface of said device wafer die element such that said first surface of said lid wafer element overlies said array of first pixel elements and said array of second pixel elements;

wherein said lid wafer element is configured to optically block said array of second pixel elements to form an array of optically blind reference pixel elements that are optically non-responsive;

wherein each first pixel element of said at least one array of first pixel elements has thermal isolation legs;

wherein each second pixel element of said at least one array of second pixel elements has thermal isolation legs; and

wherein a length of said thermal isolation legs of each first pixel element of said at least one array of first pixel elements is substantially the same as the length of said thermal isolation legs of each second pixel element of said at least one array of second pixel elements.

46. The focal plane array package assembly of claim 45, wherein said focal plane array assembly comprises an infrared focal plane array assembly.

47. A method of making a focal plane array assembly, comprising:

providing at least one first pixel and at least one second pixel on a first surface of a device wafer, said first pixel comprising an active detector pixel; and

disposing a lid wafer in relationship to said device wafer, said lid wafer comprising an optically blocking structure disposed in a spaced relationship to said second pixel of said device wafer, said optically blocking structure being configured to optically block said second pixel to form an optically blind reference pixel that is optically non-responsive;

wherein said at least one first pixel has thermal isolation legs;

wherein said at least one second pixel has thermal isolation legs; and

wherein a length of said thermal isolation legs of said at least one first pixel is substantially the same as the length of said thermal isolation legs of said at least one second pixel.

48. The method of claim 47, wherein said focal plane array assembly comprises an infrared focal plane array assembly.