Semiconductor thin film forming method and semiconductor device

• US 7,262,431 B2
• Filed: 06/28/2005
• Issued: 08/28/2007
• Est. Priority Date: 07/13/1998
• Status: Expired due to Fees

• Current Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Original Assignee: Sharp Kabushiki Kaisha (Hon Hai Precision Industry Co., Ltd.)
• Inventors: Hara, Akito, Sasaki, Nobuo
• Primary Examiner(s): Huynh; Andy
• Assistant Examiner(s): Nguyen; Thinh T
• Application Number:
  US11/167,320
• Publication Number:
  US 20050236692A1
• Time in Patent Office: 791 Days
• Field of Search: 257/64, 257/65, 257/66, 257/67
• US Class Current: 257/64
• CPC Class Codes: H01L 21/0242 Crystalline insulating materials
• CPC Class Codes: H01L 21/02422 Non-crystalline insulating materials, e.g. glass, polymers
• CPC Class Codes: H01L 21/0245 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/02488 Insulating materials
• CPC Class Codes: H01L 21/02496 Layer structure
• CPC Class Codes: H01L 21/02505 consisting of more than two layers
• CPC Class Codes: H01L 21/02513 Microstructure
• CPC Class Codes: H01L 21/02532 Silicon, silicon germanium, germanium
• CPC Class Codes: H01L 21/0262 Reduction or decomposition of gaseous compounds, e.g. CVD
• CPC Class Codes: H01L 21/02672 using crystallisation enhancing elements
• CPC Class Codes: H01L 21/02683 Continuous wave laser beam
• CPC Class Codes: H01L 21/02686 Pulsed laser beam
• CPC Class Codes: H01L 21/02691 Scanning of a beam
• CPC Class Codes: H01L 27/1281 by using structural features to control crystal growth, e.g. placement of grain filters
• CPC Class Codes: H01L 29/04 characterised by their crystalline structure, e.g. polycrystalline, cubic or particular orientation of crystalline planes characterised by physical imperfections H01L29/30
• CPC Class Codes: H01L 29/66757 Lateral single gate single channel transistors with non-inverted structure, i.e. the channel layer is formed before the gate
• CPC Class Codes: H01L 29/66772 Monocristalline silicon transistors on insulating substrates, e.g. quartz substrates H01L29/66666 takes precedence; thin film FinFETs H01L29/66795
• CPC Class Codes: H01L 29/78654 Monocrystalline silicon transistors
• CPC Class Codes: H01L 29/78675 with normal-type structure, e.g. with top gate
• CPC Class Codes: H01L 29/78696 characterised by the structure of the channel, e.g. multichannel, transverse or longitudinal shape, length or width, doping structure, or the overlap or alignment between the channel and the gate, the source or the drain, or the contacting structure of the channel H01L29/78612 takes precedence; transistors having a drain offset region or a lightly doped drain [LDD] H01L29/78621

Abstract

A polycrystal thin film forming method comprising the step of forming a semiconductor thin film on a substrate 14, and the step of flowing a heated gas to the semiconductor thin film while an energy beam 38 is being applied to the semiconductor thin film at a region to which the gas is being applied to thereby melt the semiconductor film, and crystallizing the semiconductor thin film in its solidification. The energy beam is applied while the high-temperature gas is being flowed, whereby the melted semiconductor thin film can have low solidification rate, whereby the polycrystal thin film can have large crystal grain diameters and can have good quality of little defects in crystal grains and little twins.

Claims

1. A semiconductor device including an active semiconductor film formed on an insulating substrate,

at least a channel region of the active semiconductor film having a polycrystal state which is formed of circular large-diameter crystal grain,

wherein a source/drain region of the active semiconductor film includes one part formed of micro-diameter crystal grains and another part formed of circular large-diameter crystal grains,

a radius L of the circular large-diameter crystal grain is larger than 250 nm, and the radius L is larger than W/4 when a width of the channel is represented by W.

2. A semiconductor device according to claim 1, wherein the active semiconductor film has a smaller width at the channel region than the rest part thereof.

3. A semiconductor device according to claim 1, wherein the channel region has a width-reduced part formed in.