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Wafer-level package for integrated circuits

  • US 7,262,622 B2
  • Filed: 03/24/2005
  • Issued: 08/28/2007
  • Est. Priority Date: 03/24/2005
  • Status: Active Grant
First Claim
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1. A method of wafer-level packaging an integrated circuit (IC) die, comprising:

  • providing an IC wafer comprising a plurality of die and at least one electrical contact point associated with each die;

    providing a first semiconductor cap wafer;

    forming electrically conductive paths through the first semiconductor cap wafer at positions corresponding to respective ones of the electrical contact points on the IC wafer, such that each electrically conductive path extends from a first side of the first semiconductor cap wafer to a second side of the first semiconductor cap wafer and is insulated from at least a portion of the first semiconductor cap wafer; and

    before cutting the die from the IC wafer, attaching the first semiconductor cap wafer to the IC wafer, such that the ends of the conductive paths on the first side of the first semiconductor cap wafer are electrically connected to the respective electrical contact points on the IC wafer.

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