Bi-directional buffer for interfacing test system channel

• US 7,262,624 B2
• Filed: 12/21/2004
• Issued: 08/28/2007
• Est. Priority Date: 12/21/2004
• Status: Expired due to Fees

• Current Assignee: FormFactor Incorporated
• Original Assignee: FormFactor Incorporated
• Inventors: Miller, Charles A.
• Primary Examiner(s): Nguyen; Ha Tran
• Assistant Examiner(s): Velez; Roberto
• Application Number:
  US11/018,211
• Publication Number:
  US 20060132158A1
• Time in Patent Office: 980 Days
• Field of Search: 324/754, 324/765
• US Class Current: 324/754.07
• CPC Class Codes: G01R 31/2889 Interfaces, e.g. between probe and tester G01R31/31905 and G01R1/07364 take precedence
• CPC Class Codes: G01R 31/31713 Input or output interfaces for test, e.g. test pins, buffers for scan test G01R31/318572

Abstract

An emitter follower or source follower transistor is provided in the channel of a wafer test system between a DUT and a test system controller to enable a low power DUT to drive a test system channel. A bypass resistor is included between the base and emitter of the emitter follower transistor to enable bi-directional signals to be provided between the DUT channel and test system controller, as well as to enable parametric tests to be performed. The emitter follower transistor and bypass resistor can be provided on the probe card, with a pull down termination circuit included in the test system controller. The test system controller can provide compensation for the base to emitter voltage drop of the emitter follower transistor.

Claims

1. A probe card comprising:

an emitter follower transistor having a base for connecting to a DUT, an emitter connected to a test channel for connecting to a test system controller that transmit test signals to the DUT, and a collector; and

a bypass resistor connecting the base to the emitter of the emitter follower transistor so that test signals can be provided from the DUT to the test system controller.

2. The probe card of claim 1, wherein the collector of the emitter follower transistor is connected to receive a system power supply voltage plus a voltage approximately equal to the base to emitter offset voltage of the emitter follower transistor.

3. The probe card of claim 1, further comprising:

a temperature sensor; and

a power supply circuit connected to the temperature sensor, the power supply circuit providing a voltage to the collector of the emitter follower transistor with compensation for the base to—

emitter voltage change of the emitter follower transistor due to temperature change as indicated by the temperature sensor.

4. A device tested using the probe card of claim 1.

5. A probe card comprising;

a source follower transistor having a gate for connecting to a DUT, a source connected to a channel for connecting to a test system controller that transmits test signals to the DUT, and a drain; and

a bypass resistor connecting the gate to the source of the source follower transistor so that test signals can be provided from the DUT to the test system controller.

6. An apparatus comprising:

a voltage follower transistor having a first gate or base terminal for connecting to a DUT, a second terminal for connecting through a channel of a test system to a test system controller that transmits test signals to the DUT, and a third terminal; and

a bypass resistor connecting the first terminal to the second terminal of the voltage follower transistor so that test signals can be provided from the DUT to the test system controller.

7. The apparatus of claim 6, further comprising a switch for selectively connecting the emitter of the voltage follower transistor though a resistor to ground.

8. The apparatus of claim 7, included in a probe card.

9. The apparatus of claim 6, wherein the test system controller is programmed to selectively provide a current sink path from the second terminal of the voltage follower transistor.

10. The apparatus of claim 6 further comprising:

a driver buffer connected by a current sink resistor to the second terminal of the voltage follower transistor, the driver buffer configured to provide a voltage to compensate for the voltage between the first and second terminals of the voltage follower transistor; and

a comparator buffer connected to the second terminal of the voltage follower transistor.

11. The apparatus of claim 6, wherein the third terminal of the voltage follower transistor is connected to a system test system Vdd plus a voltage approximately equal to voltage between the first and second terminals of the voltage follower transistor.

12. The apparatus of claim 6 further comprising a means to compensate for a voltage drop between the first and second terminals of the voltage follower transistor.

13. The apparatus of claim 12, wherein the means to compensate comprises:

a temperature sensor; and

a power supply circuit connected to the temperature sensor, the power supply circuit providing a voltage to the third terminal of the voltage follower transistor with compensation for the voltage drop between the first and second terminals due to a temperature change as indicated by the temperature sensor.

14. The apparatus of claim 12, wherein the means to compensate further comprises:

a memory connected to the power supply circuit for storing a calibration of voltage drop between the first and second terminals versus temperature.

15. The apparatus of claim 14, wherein the transistor comprises a bipolar junction transistor, wherein the first terminal comprises a base, the second terminal comprises an emitter and the third terminal comprises a collector.

16. The apparatus of claim 14, wherein the transistor comprises a field effect transistor, wherein the first terminal comprises a gate, the second terminal comprises a source and the third terminal comprises a drain.

17. The apparatus of claim 6 included in a test system controller.