Compact inductor with stacked via magnetic cores for integrated circuits

• US 7,262,680 B2
• Filed: 02/27/2004
• Issued: 08/28/2007
• Est. Priority Date: 02/27/2004
• Status: Expired due to Fees

• Current Assignee: Illinois Institute of Technology
• Original Assignee: Illinois Institute of Technology
• Inventors: Wang, Albert Z. H.
• Primary Examiner(s): Nguyen; Tuyen T.
• Application Number:
  US10/789,893
• Publication Number:
  US 20050190035A1
• Time in Patent Office: 1,278 Days
• Field of Search: 336/83, 336/200, 336206-208, 336/232, 257/531
• US Class Current: 336/200
• CPC Class Codes: H01F 17/0013 with stacked layers
• CPC Class Codes: H01F 2017/002 Details of via holes for interconnecting the layers
• CPC Class Codes: H01F 2017/0066 with a magnetic layer
• CPC Class Codes: H01F 41/046 structurally combined with ferromagnetic material
• CPC Class Codes: H01L 23/5227 Inductive arrangements or effects of, or between, wiring layers other inductive arrangements H01L23/645
• CPC Class Codes: H01L 28/10 Inductors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/0002 Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

Abstract

An on-chip inductor device for Integrated Circuits utilizes coils on a plurality of metal layers of the IC with electrical connectors between the coils and a magnetic core for the inductor of stacked vias running between the coils. The magnetic core is made from a series of stacked vias which are deposited between each metal layer of the IC having a coil. The magnetic core desirably includes an array of magnetic bars comprising the magnetic core. The via material of the magnetic core may be both magnetic and electrically conductive. The magnetic and electrically conductive via material may also be used for the planar coil electrical connectors or other electrically conductive parts of the IC, or both, thereby lessening fabrication steps. Films of magnetic material may be formed at the ends of the inductor to provide a closed magnetic circuit for the inductor. A high Q factor inductor of small (e.g., transistor) size is thus obtained. The materials and processes which enable the on-chip inductor device are compatible with ordinary IC fabrication methods.

Claims

1. An IC fabrication-compatible spiral inductor, comprising

the inductor having vertically stacked planar coils made from a plurality of spaced conductive layers;

the stacked planar coils being electrically connected by coil connectors;

a magnetic core disposed at a center of and extending perpendicular to each of the planar coils and comprising a plurality of vertically stacked and aligned magnetic elements; and

the inductor having a footprint dimension of about 75 μ

m×

75 μ

m or less.

2. The inductor of claim 1, wherein a material forming the magnetic elements is compatible with at least one of CMOS or BiCMOS fabrication technology.

3. The IC fabrication-compatible spiral inductor of claim 1, wherein the magnetic elements comprise electrically conductive and magnetic material.

4. The IC fabrication-compatible spiral inductor of claim 1, wherein the coil connectors comprise the same material as the magnetic elements.

5. The IC fabrication-compatible spiral inductor of claim 4, wherein the magnetic core comprises an array of magnetic element bars within the magnetic core.

6. The inductor according to claim 5, further comprising a film of magnetic material located at at least one end of the stacked planar coils.

7. The inductor according to claim 4, further comprising a film of magnetic material located at at least one end of the stacked planar coils.

8. The IC fabrication-compatible spiral inductor of claim 1, wherein the magnetic core comprises an array of magnetic element bars within the magnetic core.

9. The inductor according to claim 8, further comprising a film of magnetic material located at at least one end of the stacked planar coils.

10. The inductor according to claim 1, further comprising a film of magnetic material located at at least one end of the stacked planar coils.

11. The inductor of claim 1, wherein the inductor is a 10 nH inductor with a footprint dimension of less than 25 μ

m×

25 μ

m in a 0.1 8 μ

m six layer metal interconnect copper CMOS technology.

12. The inductor of claim 1, wherein each of the magnetic elements is disposed between two of the plurality of spaced conductive layers.

13. A single chip IC comprising the inductor of claim 1 and a core circuit electrically connected to the inductor.

23. A single chip IC comprising the inductor of claim 13 and a core circuit electrically connected to the inductor.

14. An IC fabrication-compatible spiral inductor, comprising:

a plurality of planar coils disposed in a stacked and parallel orientation;

a plurality of magnetic and conductive vias;

each of the plurality of planar coils electrically connected to an adjacent one of the plurality of planar coils by one of the plurality of the magnetic and conductive vias;

a magnetic core extending perpendicular to and through a center of each of the planar coils, the magnetic core formed of stacked and aligned magnetic elements, wherein each of the stacked and aligned magnetic elements is one of the plurality of the magnetic and conductive vias; and

the inductor having a footprint dimension of about 75 μ

m×

75 μ

m or less.

15. The inductor of claim 14, wherein each of the magnetic elements is disposed between two of the plurality of planar coils.

16. The inductor of claim 14, wherein the magnetic elements and the coil connectors comprise the same material.

17. The inductor of claim 14, wherein the magnetic element materials are compatible with at least one of CMOS or BiCMOS fabrication technology.

18. The inductor of claim 14, wherein the magnetic core comprises an array of parallel magnetic element bars within the magnetic core.

19. The inductor of claim 18, wherein each magnetic element bars of the array of parallel magnetic element bars within the magnetic core comprises a plurality of stacked and aligned magnetic elements.

20. The inductor of claim 18, further comprising a film of magnetic material located at at least one end of the stacked planar coils.

21. The inductor of claim 14, further comprising a film of magnetic material located at at least one end of the stacked planar coils.

22. The inductor of claim 14, wherein the inductor is a 10 nH inductor with a footprint dimension of 25 μ

m ×

25 μ

m in a 0.18 μ

m six layer metal interconnect copper CMOS technology.