Decoding method and apparatus
First Claim
1. A decoder, comprising:
- a feedback equalizer for receiving a modulated signal comprising a plurality of symbols, the plurality of symbols including a first symbol defined by a first number of chips; and
a subsymbol processor coupled to said feedback equalizer to generate a subsymbol waveform upon receipt of a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol and to provide the subsymbol waveform to the feedback equalizer, the second number being less than the first number, said feedback equalizer to equalize the modulated signal using the subsymbol waveform.
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0 Petitions
Accused Products
Abstract
Techniques and instrumentalities to improve ISI and ICI cancellation in reception of modulated symbols by selectively decoding subsymbols of such modulated symbol before they can be completely decided or perceived as well as use of decoded symbol/subsymbol information in the feedback equalization process are disclosed. In particular, a decoder and corresponding method are disclosed which includes a feedback equalizer capable of receiving a modulated signal including a symbol defined by a first number of chips, along with a subsymbol processor to generate a subsymbol waveform upon receipt of a second number, less than the first number, of chips of such symbol and provide the subsymbol waveform to the feedback equalizer in order to equalize the modulated signal using the subsymbol waveform. Other disclosed aspects including techniques and instrumentalities for improving reception performance when symbols encoded by different modulation schemes are encountered, as well as feedback equalization for Barker encoded symbols present in the received signal.
92 Citations
102 Claims
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1. A decoder, comprising:
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a feedback equalizer for receiving a modulated signal comprising a plurality of symbols, the plurality of symbols including a first symbol defined by a first number of chips; and a subsymbol processor coupled to said feedback equalizer to generate a subsymbol waveform upon receipt of a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol and to provide the subsymbol waveform to the feedback equalizer, the second number being less than the first number, said feedback equalizer to equalize the modulated signal using the subsymbol waveform. - View Dependent Claims (2, 3, 4)
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5. A decoder, comprising:
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a feedback equalizer for receiving a modulated signal comprising a plurality of symbols, the plurality of symbols including a first symbol defined by a first number of chips; a subsymbol processor coupled to said feedback equalizer to generate a subsymbol waveform upon receipt of a second number of chips of the first symbol and provide the subsymbol waveform to the feedback equalizer, the second number being less than the first number, said feedback equalizer to equalize the modulated signal using the subsymbol waveform; a demodulation unit coupled to said feedback equalizer and comprising subsymbol decoding processing logic for generating decoded subsymbol information upon receiving the second number of chips of the symbol; and a remodulation unit coupled to said demodulation unit and said feedback equalizer, said remodulation unit generating a subsymbol waveform corresponding to the decoded subsymbol information. - View Dependent Claims (6, 7, 8, 9)
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10. A transceiver, comprising:
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a feedback equalizer for receiving a modulated signal, comprising a plurality of symbols, the plurality of symbols including a first symbol defined by a first number of chips; and a subsymbol processor coupled to said feedback equalizer to generate a subsymbol waveform upon receipt of a second number of chips of the first symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol and to provide the subsymbol waveform to the feedback equalizer, the second number being less than the first number, said feedback equalizer to equalize the modulated signal using the subsymbol waveform. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17)
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18. A transceiver, comprising:
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a feedback equalizer for receiving a modulated signal, comprising a plurality of symbols, the plurality of symbols including a first symbol defined by a first number of chips; a subsymbol processor coupled to said feedback equalizer to generate a subsymbol waveform upon receipt of a second number of chips of the first symbol and provide the subsymbol waveform to the feedback equalizer, the second number being less than the first number, said feedback equalizer to equalize the modulated signal using the subsymbol waveform; a demodulation unit coupled said feedback equalizer and comprising decoding processing logic capable of generating decoded subsymbol information upon perceiving the second number of chips of the symbol; and a remodulation unit coupled to said demodulation unit and said feedback equalizer, said remodulation unit generating a subsymbol waveform corresponding to the decoded subsymbol information. - View Dependent Claims (19, 20, 21, 22)
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23. A decoding method for a modulated signal including a symbol defined by a first number of chips, comprising:
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generating a subsymbol waveform upon receipt of a second number of chips of the symbol, the second number being less than the first number, wherein said generating step comprises; generating decoded subsymbol information upon receiving the second number of chips of the symbol; and generating a subsymbol waveform corresponding to the decoded subsymbol information; equalizing the modulated signal using the subsymbol waveform; and correlating the received second number of chips against a subset of valid candidate symbols to obtain a best match candidate; and wherein said decoded subsymbol generating step comprises generating the decoded subsymbol information based on the best match candidate.
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24. A computer program product, comprising computer readable program code causing an information processor to perform the following steps, comprising:
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receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; generating a subsymbol waveform upon receipt of a second number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chips of the symbol, the second number being less than the first number; and equalizing the modulated signal using the subsymbol waveform. - View Dependent Claims (25, 26, 27, 28, 29, 30, 31)
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32. A computer program product, comprising computer readable program code causing an information processor to perform the following steps, comprising:
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receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; generating a subsymbol waveform upon receipt of a second number of chips of the symbol, the second number being less than the first number, wherein said generating step comprises; generating decoded subsymbol symbol information upon perceiving the second number of chips of the symbol; and generating a subsymbol waveform corresponding to the decoded subsymbol information; equalizing the modulated signal using the subsymbol waveform; and correlating the perceived second number of chips against a subset of valid candidate symbols to obtain a best match candidate; and wherein said decoded subsymbol symbol generating step comprises generating the decoded subsymbol information based on the best match candidate.
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33. An information processing system including an information processor coupled to memory, the memory comprising computer readable program code causing the information processor to perform the following operations, comprising:
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receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; generating a subsymbol waveform upon receipt of a second number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chips of the symbol, the second number being less than the first number; and equalizing the modulated signal using the subsymbol waveform. - View Dependent Claims (34, 35, 36, 37, 38, 39, 40)
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41. An information processing system including an information processor coupled to memory, the memory comprising computer readable program code causing the information processor to perform the following operations, comprising:
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receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; generating a subsymbol waveform upon receipt of a second number of chips of the symbol, the second number being less than the first number, wherein said generating step comprises; generating decoded subsymbol information upon perceiving the second number of chips of the symbol; and generating a subsymbol waveform corresponding to the decoded subsymbol information; equalizing the modulated signal using the subsymbol waveform; and correlating the perceived second number of chips against a subset of valid candidate symbols to obtain a best match candidate; and wherein said decoded subsymbol generating step comprises generating the decoded subsymbol information based on the best match candidate.
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42. A decoder, comprising:
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a feedback equalizer capable of receiving a modulated signal, the modulated signal including a plurality of symbols a Barker encoded symbol defined by a first number of chips; and a symbol processor coupled to said feedback equalizer to generate a decoded waveform upon receipt of a second number of chips of the symbol less than the first number and before at least one of receiving, decoding, and deciding the first number of chips of the symbol, and to provide the decoded waveform to the feedback equalizer, said feedback equalizer to equalize the modulated signal using the decoded waveform. - View Dependent Claims (43, 44, 45, 46, 47, 48)
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49. A computer program product, comprising computer readable program code causing an information processor to perform the following steps, comprising:
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receiving a modulated signal including a plurality of symbols including a Barker encoded symbol defined by a first number of chips; generating a decoded waveform upon receipt of a second number of chips less than the first number of chips of the Barker encoded symbol and before at least one of receiving, decoding, and deciding the first number of chips of the Barker encoded symbol; and equalizing the modulated signal using the decoded waveform. - View Dependent Claims (50, 51)
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52. An information processing system including an information processor coupled to memory, the memory comprising computer readable program code causing the information processor to perform the following operations, comprising:
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receiving a modulated signal including a plurality of symbols including a Barker encoded symbol defined by a first number of chips; generating a decoded waveform upon receipt of a second number of chips less than the first number of chips of the Barker encoded symbol and before at least one of receiving, decoding, and deciding the first number of chips of the Barker encoded symbol; and equalizing the modulated signal using the decoded waveform. - View Dependent Claims (53, 54)
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55. A decoding unit, comprising:
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a decision feedback equalizer having an input capable of receiving modulated signal including a received symbol defined by a first number of chips and an output; a demodulation unit coupled to the output of said decision feedback equalizer, comprising; a decoder capable of decoding the received symbol upon receipt of the first number of chips defining the received symbol; and partial correlation logic for generating a decoded subsymbol upon receipt of a second number of chips of the received symbol and before at least one of receiving, decoding, and deciding the first number of chips of the received symbol, the second number being less than the first number; and a remodulation unit coupled to said partial correlation logic of said demodulation unit and said decision feedback equalizer, said remodulation unit for generating a subsymbol waveform corresponding to the decoded subsymbol, said decision feedback equalizer to equalize the modulated remodulated signal using the subsymbol waveform. - View Dependent Claims (56, 57, 58, 59)
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60. A decoder, comprising:
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means for receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; and means for generating a subsymbol waveform upon receipt of a second number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chins of the first symbol, and for providing the subsymbol waveform to the receiving means, the second number being less than the first number, said receiving means including means for equalizing the modulated signal using the subsymbol waveform. - View Dependent Claims (61, 62, 63, 64, 65, 67, 68, 69)
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66. A decoder, comprising:
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means for receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; and means for generating a subsymbol waveform upon receipt of a second number of chips of the symbol and for providing the subsymbol waveform to the receiving means, the second number being less than the first number, said receiving means including means for equalizing the modulated signal using the subsymbol waveform, wherein said generating means comprises; demodulation means for generating decoded subsymbol information upon perceiving the second number of chips of the symbol; and remodulation means for remodulating a subsymbol waveform corresponding to the decoded subsymbol information, wherein said demodulation means further comprises symbol correlator means for correlating the perceived second number of chips against a subset of valid candidate symbols to obtain a best match candidate, said demodulation means generating the decoded subsymbol information based on the best match candidate.
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70. A feedback equalizer comprising:
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means for receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; means for generating a subsymbol waveform upon receipt of a second number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chips of the symbol, the second number being less than the first number; and means for selectively filtering the subsymbol waveform from said modulated signal. - View Dependent Claims (71, 72, 73, 74, 75, 76)
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77. A feedback equalizer comprising:
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means for receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; means for generating a subsymbol waveform upon receipt of a second number of chips of the symbol, the second number being less than the first number, wherein said generating means comprises; demodulation means for generating decoded subsymbol information upon perceiving the second number of chips of the symbol; and remodulation means for generating a subsymbol waveform corresponding to the decoded subsymbol information; and means for selectively filtering the subsymbol waveform from said modulated signal, wherein said demodulation means further comprises means for correlating the perceived second number of chips against a subset of valid candidate symbols to obtain a best match candidate, said demodulation means generating the decoded subsymbol information based on the best match candidate.
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78. A transceiver, comprising:
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means for receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; and means for generating a subsymbol waveform upon receipt of a second number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chips of the symbol, and for providing the subsymbol waveform to the receiving means, the second number being less than the first number, said receiving means including means for equalizing the modulated signal using the subsymbol waveform. - View Dependent Claims (79, 80, 81, 82, 83, 84, 85, 86, 87, 88, 89)
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90. A transceiver, comprising:
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means for receiving a modulated signal, the modulated signal including a symbol defined by a first number of chips; and means for generating a subsymbol waveform upon receipt of a second number of chips of the symbol and for providing the subsymbol waveform to the receiving means, the second number being less than the first number, said receiving means including means for equalizing the modulated signal using the subsymbol waveform, wherein said generating means comprises; demodulation means for generating decoded subsymbol information upon perceiving the second number of chips of the symbol; and remodulation means for re-modulating a subsymbol waveform corresponding to the decoded subsymbol information, wherein said demodulation means further comprises symbol correlator means for correlating the perceived second number of chips against a subset of valid candidate symbols to obtain a best match candidate, said demodulation means generating the decoded subsymbol information based on the best match candidate.
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91. A decoder, comprising,
means for receiving a modulated signal, the modulated signal including a Barker encoded symbol defined by a first number of chips; - and
means for generating a decided waveform upon receipt of the first number of chips of the symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol, and for providing the decided waveform to the receiving means, said receiving means including means for equalizing the modulated signal using the decided waveform. - View Dependent Claims (92, 93, 94, 95, 96, 97)
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98. A decoding unit, comprising:
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decision feedback equalization means having an input capable of receiving modulated signal including a received symbol defined by a first number of chips and an output; demodulation means comprising; decoding means for decoding the received symbol upon receipt of the first number of chips defining the received symbol; and partial correlation logic means for generating a decoded subsymbol upon receipt of a second number of chips of the received symbol and before at least one of receiving, decoding, and deciding the first number of chips of the first symbol, the second number being less than the first number; and remodulation means for generating a subsymbol waveform corresponding to the decoded subsymbol, said decision feedback equalization means including means for equalizing the modulated signal using the subsymbol waveform. - View Dependent Claims (99, 100, 101, 102)
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Specification