×

LSI, test pattern generating method for scan path test, LSI inspecting method, and multichip module

  • US 7,263,640 B2
  • Filed: 12/05/2005
  • Issued: 08/28/2007
  • Est. Priority Date: 12/13/2004
  • Status: Expired due to Fees
First Claim
Patent Images

1. An LSI having a power control function or a power-off function, comprising:

  • power terminals;

    ground terminals;

    registers, connected as a scan chain and capable of holding power control information;

    a gate circuit, capable of controlling a clock signal to be supplied to the registers;

    a clock control terminal capable of inputting a control signal for controlling the gate circuit;

    scan-in terminals capable of inputting scan signals; and

    scan-out terminals capable of outputting the scan signals;

    wherein;

    the control signal is supplied from the outside and the scan signals are monitored during a structured test.

View all claims
  • 2 Assignments
Timeline View
Assignment View
    ×
    ×