Semiconductor device including inclined cut surface and manufacturing method thereof

• US 7,264,997 B2
• Filed: 07/16/2004
• Issued: 09/04/2007
• Est. Priority Date: 07/16/2003
• Status: Active Grant

• Current Assignee: Semiconductor Components Industries LLC (ON Semiconductor Corporation)
• Original Assignee: Kanto Sanyo Semiconductors Company Limited (Panasonic Holdings Corporation), Sanyo Electric Company Limited (Panasonic Holdings Corporation)
• Inventors: Kameyama, Koujiro, Mita, Kiyoshi
• Primary Examiner(s): Toledo; Fernando L.
• Application Number:
  US10/892,483
• Publication Number:
  US 20050012187A1
• Time in Patent Office: 1,145 Days
• Field of Search: 438/110, 438/113, 438/114, 257/678, 257/692, 257/701
• US Class Current: 438/113
• CPC Class Codes: H01L 21/6835 using temporarily an auxiliary support
• CPC Class Codes: H01L 21/78 with subsequent division of the substrate into plural individual devices cutting to change the surface-physical characteristics or shape of semiconductor bodies H01L21/304
• CPC Class Codes: H01L 2221/68331 of passive members, e.g. die mounting substrate
• CPC Class Codes: H01L 2224/32245 the item being metallic
• CPC Class Codes: H01L 2224/451 with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
• CPC Class Codes: H01L 2224/48091 Arched
• CPC Class Codes: H01L 2224/48247 connecting the wire to a bond pad of the item
• CPC Class Codes: H01L 2224/48465 the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
• CPC Class Codes: H01L 2224/73265 Layer and wire connectors
• CPC Class Codes: H01L 2224/83 using a layer connector
• CPC Class Codes: H01L 2224/85 using a wire connector
• CPC Class Codes: H01L 2224/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 23/3107 the device being completely enclosed
• CPC Class Codes: H01L 23/49548 Cross section geometry H01L23/49562 takes precedence
• CPC Class Codes: H01L 24/45 of an individual wire connector
• CPC Class Codes: H01L 24/48 of an individual wire connector
• CPC Class Codes: H01L 24/73 Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
• CPC Class Codes: H01L 24/97 the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00012 Relevant to the scope of the group, the symbol of which is combined with the symbol of this group
• CPC Class Codes: H01L 2924/00014 : the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01005 : Boron [B]
• CPC Class Codes: H01L 2924/01006 : Carbon [C]
• CPC Class Codes: H01L 2924/01013 : Aluminum [Al]
• CPC Class Codes: H01L 2924/01023 : Vanadium [V]
• CPC Class Codes: H01L 2924/01029 : Copper [Cu]
• CPC Class Codes: H01L 2924/01033 : Arsenic [As]
• CPC Class Codes: H01L 2924/01047 : Silver [Ag]
• CPC Class Codes: H01L 2924/01074 : Tungsten [W]
• CPC Class Codes: H01L 2924/01078 : Platinum [Pt]
• CPC Class Codes: H01L 2924/01082 : Lead [Pb]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/181 : Encapsulation
• CPC Class Codes: H01L 2924/18301 : being an anchoring portion, i.e. mechanical interlocking between the encapsulation resin and another package part
• CPC Class Codes: H05K 2201/09154 : Bevelled, chamferred or tapered edge
• CPC Class Codes: H05K 2201/10772 : Leads of a surface mounted component bent for providing a gap between the lead and the pad during soldering
• CPC Class Codes: H05K 2201/10931 : Exposed leads, i.e. encapsulation of component partly removed for exposing a part of lead, e.g. for soldering purposes
• CPC Class Codes: H05K 3/3426 : characterised by the leads
• CPC Class Codes: H05K 3/3442 : having edge contacts, e.g. leadless chip capacitors, chip carriers
• CPC Class Codes: Y02P 70/50 : Manufacturing or production processes characterised by the final manufactured product

Abstract

A semiconductor device comprises a semiconductor element and electrodes electrically connected to the semiconductor element, the semiconductor element and the electrodes being sealed by a sealing agent having an insulating property, the electrodes being exposed around a mounting surface that is joined via a joining agent to an external mounting circuit board, wherein the electrodes are shaped so that the joining agent is visually identifiable from side surfaces surrounding the mounting surface when the mounting surface is joined via the joining agent to the mounting circuit board.

Claims

1. A semiconductor device comprising:

an electrically-insulating sealed body forming a mounting surface, a first side surface substantially perpendicular to the mounting surface, a second side surface substantially perpendicular to the first side surface and the mounting surface, a first inclined cut surface disposed between the mounting surface and the first side surface, and a second inclined cut surface disposed between the mounting surface and the second side surface;

a semiconductor element disposed within said sealed body; and

first through fourth electrodes disposed within said sealed body and electrically connected to the semiconductor element, the first and second electrodes each being exposed on the mounting surface and the first inclined cut surface, and the third and fourth electrodes each being exposed on the mounting surface and the second inclined cut surface,

wherein the first and second inclined cut surfaces are linearly or curvedly inclined cut surfaces.

2. A semiconductor device comprising:

an electrically-insulating sealed body forming a mounting surface, a side surface substantially perpendicular to the mounting surface, and an inclined cut surface disposed between the mounting surface and the side surface;

a semiconductor element disposed within said sealed body; and

a plurality of electrodes disposed within said sealed body and electrically connected to the semiconductor element, the plurality of electrodes each being exposed on the mounting surface and the inclined cut surface.

3. The semiconductor device of claim 2, further comprising a die pad, wherein the semiconductor element is electrically connected and fastened to said die pad.

4. The semiconductor device of claim 3, wherein the die pad is comprised of copper (Cu).

5. The semiconductor device of claim 3, wherein the semiconductor element is fastened to said die pad via a die-bonding joining agent selected from the group consisting of silver (Ag) paste, solder, and an adhesive.

6. The semiconductor device of claim 2,

wherein the semiconductor element further comprises electrode pads, and

wherein the plurality of electrodes are electrically connected to the electrode pads via metal wires.

7. The semiconductor device of claim 2, wherein each electrode is comprised of copper.

8. The semiconductor device of claim 2, wherein each electrode further comprises a protruding portion configured to anchor the electrode to the sealed body.

9. The semiconductor device of claim 2, wherein the sealed body is comprised of a resin selected from the group consisting of an epoxy resin, a polyimide thermoplastic resin, and a poly phenylene sulfide thermoplastic resin.

10. The semiconductor device of claim 2, wherein each of the plurality of electrodes are unexposed on the side surface.

11. The semiconductor device of claim 2,

wherein the side surface further includes a first side surface, and second side surface substantially perpendicular to the first side surface and the mounting surface,

wherein the inclined cut surface further includes a first inclined cut surface disposed between the mounting surface and the first side surface, and a second inclined cut surface disposed between the mounting surface and the second side surface,

wherein a first and a second electrode are exposed on the mounting surface and the first inclined cut surface, and

wherein a third and a fourth electrode are exposed on the mounting surface and the second inclined cut surface.

12. The semiconductor device of claim 3, wherein the die pad is exposed on the mounting surface.

13. The semiconductor device of claim 2, wherein each electrode further comprises a plated layer.

14. The semiconductor device of claim 13, wherein the plated layer is selected from the group consisting of a solder-plated layer, a nickel (Ni) plated layer, and a silver (Ag) plated layer.

15. The semiconductor device of claim 2, wherein each of electrodes are exposed on the side surface.

16. The semiconductor device of claim 2, wherein the inclined cut surface is a linearly-inclined cut surface.

17. The semiconductor device of claim 2, wherein the inclined cut surface is a curvedly-inclined cut surface.

18. A method for manufacturing a semiconductor device, comprising:

electrically-connecting a semiconductor element to first through fourth electrodes;

sealing the first through fourth electrodes and the semiconductor element within an electrically-insulating sealed body, with the first through fourth electrodes exposed on a mounting surface of the sealed body;

half-cutting a first inclined cut surface into the sealed body, thereby exposing the first and second electrodes on the first inclined cut surface, the first inclined cut surface being a linearly or curvedly inclined cut surface;

half-cutting a second inclined cut surface into the sealed body, thereby exposing the third and fourth electrodes on the second inclined cut surface, the second inclined cut surface being a linearly or curvedly inclined cut surface;

forming a first side surface into the sealed body, the first side surface being substantially perpendicular to the mounting surface, and the first inclined cut surface disposed between the mounting surface and the first side surface; and

forming a second side surface into the sealed body, the second side surface being substantially perpendicular to the mounting surface and the first side surface, and the second inclined cut surface disposed between the mounting surface and the second side surface.

19. A method for manufacturing a semiconductor device comprising:

electrically-connecting a semiconductor element to a plurality of electrodes;

sealing the plurality of electrodes and the semiconductor element within an electrically-insulating sealed body, with the plurality of electrodes exposed on a mounting surface of the sealed body;

half-cutting an inclined cut surface into the sealed body, thereby exposing the plurality of electrodes on the inclined cut surface; and

forming a side surface into the sealed body, the side surface being substantially perpendicular to the mounting surface, and the inclined cut surface disposed between the mounting surface and the side surface.

20. The method of claim 19, further comprising forming the plurality of electrodes and a die pad on a conductive foil using etching.

21. The method of claim 19, further comprising fastening the semiconductor element onto a die pad using thermosetting.

22. The method of claim 19, further comprising:

affixing a resin sheet to the conductive foil prior to sealing the sealed body; and

removing the resin sheet from the conductive foil after sealing the sealed body.

23. The method of claim 19, further comprising:

affixing a dicing sheet to an upper surface obverse to said mounting surface; and

fastening the dicing sheet to a dicing device.

24. The method of claim 19, wherein the inclined cut surface is half-cut using a blade with a U-shaped or V-shaped edge.

25. The method of claim 19, wherein the inclined cut surface is half of the thickness of the plurality of electrodes.

26. The method of claim 19, further comprising forming plated layers over the plurality of electrodes.

27. The method of claim 19, wherein the plated layers are formed using electrolytic plating.

28. The method of claim 19, wherein forming the side surface into the sealed body further comprises cutting the sealed body to form the side surface.

29. The method of claim 19, wherein forming the side surface into the sealed body further comprises applying pressure to the sealed body to form the side surface.

30. The method of claim 19, wherein the inclined cut surface is a linearly-inclined cut surface.

31. The method of claim 19, wherein the inclined cut surface is a curvedly-inclined cut surface.