System and method for providing a hardware icon with magnification and security

• US 7,265,764 B2
• Filed: 09/03/2002
• Issued: 09/04/2007
• Est. Priority Date: 08/27/2002
• Status: Active Grant

• Current Assignee: NVIDIA Corporation
• Original Assignee: NVIDIA Corporation
• Inventors: Alben, Jonah M., Pember, Bruce W.
• Primary Examiner(s): Brier; Jeffery A.
• Application Number:
  US10/234,981
• Publication Number:
  US 20040041845A1
• Time in Patent Office: 1,827 Days
• Field of Search: 345634-638, 715/867, 348/584, 348/589, 348/600, 348/601
• US Class Current: 345/634
• CPC Class Codes: G09G 2340/10 Mixing of images, i.e. displayed pixel being the result of an operation, e.g. adding, on the corresponding input pixels
• CPC Class Codes: G09G 2340/125 wherein one of the images is motion video
• CPC Class Codes: G09G 5/08 Cursor circuits
• CPC Class Codes: G09G 5/225 comprising a loadable character generator character generators per se G09G5/24
• CPC Class Codes: G09G 5/30 Control of display attribute
• CPC Class Codes: G09G 5/32 with means for controlling the display position see provisionally G09G5/42

Abstract

A compositor for providing a pixel value corresponding to a current pixel is implemented on a chip. A desktop pixel logic circuit supplies a desktop pixel value. A cursor logic circuit supplies a cursor pixel value. A hardware icon logic circuit provides an icon pixel value by accessing an icon memory located on the compositor chip. The hardware icon logic circuit supports selectable magnification and color modes. Priority logic selects one of the icon pixel value, the desktop pixel value, and the cursor pixel value as the final pixel value. Whether the hardware icon is displayed can be controlled based on a hardware condition.

Claims

1. A compositor implemented on a chip for providing a final pixel value corresponding to a current pixel, comprising:

a desktop pixel logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a first on-chip memory configured to store cursor data;

a second on-chip memory configured to store hardware icon data;

a cursor logic circuit configured to read the cursor data from the first on-chip memory and to generate a cursor pixel value corresponding to the current pixel when the current pixel is within a cursor region;

a hardware icon logic circuit configured to read the hardware icon data from the second on-chip memory and to generate an icon pixel value corresponding to the current pixel when the current pixel is within an icon region; and

a priority logic circuit configured to compute the final pixel value using one or more of the desktop pixel value, the cursor pixel value, or the icon pixel value, wherein the priority logic circuit is further configured such that when the current pixel is within both the icon region and the cursor region, the icon pixel value is used to compute the final pixel value in the event that an icon enable signal is asserted and the cursor pixel value is used to compute the final pixel value in the event that a cursor enable signal is asserted,

wherein the priority logic circuit is configured to compute the final pixel value by blending two or more pixel values selected from a group consisting of the desktop pixel value, the cursor pixel value, and the icon pixel value.

2. The compositor of claim 1, wherein:

the hardware icon logic circuit is further configured to generate an icon enable signal, and

the priority logic circuit is further configured such that the icon pixel value is not used to compute the final pixel value when the icon enable signal is not asserted.

3. The compositor of claim 2, wherein the compositor is incorporated into a device and whether the icon enable signal is asserted is determined at least in part by a state of a hardware component of the device.

4. The compositor of claim 1, wherein the desktop pixel logic circuit includes:

a plurality of interfaces, each configured to receive a respective one of a plurality of candidate desktop pixel values; and

a selection subcircuit configured to select one of the candidate desktop pixel values as the desktop pixel value.

5. The compositor of claim 1, wherein the priority logic circuit is configured to compute the final pixel value at least in part by selecting one of the desktop pixel value, the cursor pixel value, and the icon pixel value.

6. The compositor of claim 1 wherein the priority logic circuit is configured to compute the final pixel value by performing a logical XOR operation on two values selected from a group of candidate pixel values, wherein the group of candidate pixel values consists of the desktop pixel value, the cursor pixel value, and the icon pixel value.

7. A compositor for providing a final pixel value corresponding to a current pixel, comprising:

a desktop pixel logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a cursor logic circuit configured to generate a cursor pixel value corresponding to the current pixel using cursor data stored in a first memory when the current pixel is within the cursor region;

a hardware icon logic circuit configured to retrieve hardware icon data from a second memory and to generate an icon pixel value corresponding to the current pixel when the current pixel is within an icon region, wherein the hardware icon logic circuit is further configured to select a pixel of the hardware icon data to be retrieved for the current pixel based in part on an icon magnification signal; and

a priority logic circuit configured to compute the final pixel value using one or more of the desktop pixel value, the cursor pixel value, or the icon pixel value.

8. The compositor of claim 7, wherein the compositor is implemented on a chip and the second memory is located on the chip.

9. The compositor of claim 7, wherein:

the hardware icon logic circuit is further configured to generate an icon enable signal; and

the priority logic circuit is further configured such that the icon pixel value is not selected as the final pixel value when the icon enable signal is not asserted.

10. The compositor of claim 9, wherein the hardware icon logic circuit includes:

a storage register configured to store an icon state indicator, wherein the icon enable signal is not asserted when the icon state indicator has an inactive value.

11. The compositor of claim 10, wherein the storage register is updated without interaction with an operating system.

12. The compositor of claim 9, wherein the hardware icon logic circuit includes:

a plurality of storage registers configured to store icon position data and an icon magnification factor;

a first subcircuit configured to determine from a screen coordinate of the current pixel, the icon magnification factor, and the icon position data whether the current pixel is within the icon region, wherein the icon enable signal is not asserted when the current pixel is not within the icon region;

a second subcircuit configured to determine a local coordinate of the current pixel from the screen coordinate and the icon magnification factor; and

a third subcircuit configured to retrieve the icon pixel value from the second memory based on the local coordinate when the current pixel is within the icon region.

13. The compositor of claim 7, wherein the hardware icon logic circuit is further configured to operate in either of a monochrome mode and a multicolor mode.

14. The compositor of claim 13, wherein the hardware icon logic circuit includes:

a first subcircuit configured to retrieve the hardware icon data from the second memory based on a local coordinate of the current pixel,

wherein the first subcircuit retrieves one bit of the hardware icon data in the monochrome mode and a plurality of bits of the hardware icon data in the multicolor mode.

15. The compositor of claim 14, wherein the multicolor mode is a palette color mode.

16. The compositor of claim 15, wherein the hardware icon logic circuit further includes:

a plurality of storage registers, each configured to store a color value; and

a multiplexer having a plurality of input terminals, each coupled to receive a color value from a respective one of the plurality of storage registers, a control terminal coupled to receive the hardware icon data retrieved by the memory controller in the multicolor mode, and an output terminal coupled to provide the icon pixel value.

17. A compositor for providing a pixel value corresponding to a current pixel, comprising:

a desktop logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a cursor logic circuit configured to generate a cursor pixel value corresponding to the current pixel from cursor data stored in a first memory when the current pixel is within a cursor region;

a hardware icon logic circuit configured to read hardware icon data from a second memory and to supply an icon pixel value corresponding to the current pixel when the current pixel is within an icon region, wherein the hardware icon logic circuit is configured to operate in one of a monochrome mode and a multicolor mode in response to a color mode signal; and

a priority logic circuit configured to compute the final pixel value using one or more of the desktop pixel value, the cursor pixel value, or the icon pixel value.

18. The compositor of claim 17, wherein the compositor is implemented on a chip and the second memory is located on the chip.

19. The compositor of claim 17, wherein the hardware icon logic circuit comprises:

a first subcircuit configured to retrieve the hardware icon data from the second memory based on a local coordinate of the current pixel,

wherein the first subcircuit is configured to retrieve one bit of the hardware icon data in the monochrome mode and a plurality of bits of the hardware icon data in the multicolor mode.

20. The compositor of claim 17, wherein the multicolor mode is a palette color mode.

21. The compositor of claim 20, wherein the hardware icon logic circuit further includes:

a plurality of storage registers, each configured to store a color value; and

a multiplexer having a plurality of input terminals, each coupled to receive a color value from a respective one of the plurality of storage registers, a control terminal coupled to receive the hardware icon data retrieved by the memory controller in the multicolor mode, and an output terminal coupled to provide the icon pixel value.

22. The compositor of claim 17, wherein the priority logic circuit is configured to compute the final pixel value at least in part by selecting one of the desktop pixel value, the cursor pixel value, and the icon pixel value.

23. The compositor of claim 17, wherein the priority logic circuit is configured to compute the final pixel value at least in part by blending two or more pixel values selected from a group consisting of the desktop pixel value, the cursor pixel value, and the icon pixel value.

24. The compositor of claim 17, wherein the priority logic circuit is configured to compute the final pixel value by performing a logical XOR operation on two values selected from a group of candidate pixel values, wherein the group of candidate pixel values consists of the desktop pixel value, the cursor pixel value, and the icon pixel value.

25. A compositor for providing a final pixel value corresponding to a current pixel, comprising:

a desktop pixel logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a cursor logic circuit configured to generate a cursor pixel value corresponding to the current pixel from cursor data stored in a cursor memory when the current pixel is within a cursor region;

a hardware icon logic circuit configured to retrieve hardware icon data from a hardware icon memory and to generate an icon pixel value corresponding to the current pixel when the current pixel is within an icon region, the hardware icon logic circuit selecting a pixel of the hardware icon data to be retrieved for the current pixel based in part on an icon magnification signal; and

a priority logic circuit configured to compute the final pixel value using one or more of the desktop pixel value, the cursor pixel value, or the icon pixel value,

wherein the priority logic circuit is further configured such that when the current pixel is within both the icon region and the cursor region, the priority logic circuit uses the icon pixel value when an icon enable signal is asserted and the cursor pixel value when a cursor enable signal is asserted.

26. The compositor of claim 25, wherein:

the hardware icon logic circuit is further configured to generate an icon enable signal; and

the priority logic circuit is further configured such that the icon pixel value is not selected as the final pixel value when the icon enable signal is not asserted.

27. The compositor of claim 26, wherein the hardware icon logic circuit includes:

a storage register configured to store an icon state indicator, wherein the icon enable signal is not asserted when the icon state indicator has an inactive value.

28. The compositor of claim 27, wherein the storage register is updated without interaction with an operating system.

29. The compositor of claim 25, wherein the hardware icon logic circuit includes:

a plurality of storage registers configured to store icon position data and the icon magnification factor;

a first subcircuit configured to determine from a screen coordinate of the current pixel, the icon magnification factor, and the icon position data whether the current pixel is within the icon region, wherein the icon enable signal is not asserted when the current pixel is not within the icon region;

a second subcircuit configured to determine a local coordinate of the current pixel from the screen coordinate and the icon magnification factor; and

a third subcircuit configured to retrieve the icon pixel value from the hardware icon memory based on the local coordinate when the current pixel is within the icon region.

30. The compositor of claim 25, wherein the hardware icon logic circuit is further configured to operate in either of a monochrome mode and a multicolor mode.

31. The compositor of claim 30, wherein the hardware icon logic circuit includes:

a first subcircuit configured to retrieve the hardware icon data from the hardware icon memory based on a local coordinate of the current pixel,

wherein the first subcircuit retrieves one bit of the hardware icon data in the monochrome mode and a plurality of bits of the hardware icon data in the multicolor mode.

32. The compositor of claim 31, wherein the multicolor mode is a palette color mode.

33. The compositor of claim 32, wherein the hardware icon logic circuit further includes:

a plurality of storage registers, each configured to store a color value; and

a multiplexer having a plurality of input terminals, each coupled to receive a color value from a respective one of the plurality of storage registers, a control terminal coupled to receive the hardware icon data retrieved by the memory controller in the multicolor mode, and an output terminal coupled to provide the icon pixel value.

34. A compositor for providing a pixel value corresponding to a current pixel of a display, comprising:

a desktop pixel logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a first register configured to store a blank-screen color value;

a second register configured to store a state of a blank enable signal;

a first selection circuit configured to select one of the desktop pixel value and the blank-screen color value to be provided in response to the state of the blank enable signal, wherein when the blank-enable signal is asserted, the blank-screen color value is selected over the desktop pixel value as the pixel value for all pixels of the display;

a hardware icon logic circuit configured to read hardware icon data from a hardware icon memory, to supply an icon pixel value corresponding to the current pixel when the current pixel is within an icon region, and to generate an icon enable signal; and

a second selection circuit configured to receive the icon pixel value and the icon enable signal from the hardware icon logic circuit, to receive as an underlying pixel value the selected one of the desktop pixel value and the blank-screen color value, and to provide one of the icon pixel value and the underlying pixel value in response to the icon enable signal.

35. The compositor of claim 34 wherein the state of the blank enable signal is changed in response to a user action.

36. The compositor of claim 34, wherein the state of the blank enable signal is changed without an action by an operating system.

37. A method for providing a final pixel value corresponding to a current pixel, comprising:

receiving a desktop pixel value corresponding to the current pixel;

when the current pixel is within a cursor region, obtaining a cursor pixel value corresponding to the current pixel using cursor data stored in a first on-chip memory;

when the current pixel is within an icon region, obtaining an icon pixel value corresponding to the current pixel using hardware icon data stored in a second on-chip memory, the second on-chip memory being located on the same chip as the first on-chip memory, wherein obtaining the icon pixel value includes selecting a pixel of the hardware icon data based in part on an icon magnification factor; and

computing the final pixel value using one or more of the desktop pixel value, the cursor pixel value, or the icon pixel value.

38. The method of claim 37, further comprising:

determining whether the current pixel is within the icon region by using a screen coordinate of the current pixel, the icon magnification factor, and an icon position coordinate.

39. The method of claim 37, wherein obtaining an icon pixel value corresponding to the current pixel includes:

determining a local pixel coordinate when the current pixel is within the icon region, wherein the local pixel coordinate depends on the icon magnification factor; and

retrieving a hardware icon data value corresponding to the local pixel coordinate from the second on-chip memory.

40. The method of claim 39, further comprising:

using the retrieved hardware icon data value to select one of a plurality of colors from a predefined color palette.

41. The method of claim 37, wherein obtaining an icon pixel value corresponding to the current pixel includes:

determining whether the hardware icon data is stored in a monochrome mode or a multicolor mode;

when the hardware icon data is stored in the monochrome mode, reading one bit of data from the second on-chip memory; and

when the hardware icon data is stored in the multicolor mode, reading at least two bits of data from the second on-chip memory.

42. The method of claim 41, further comprising:

when the icon data is in the multicolor mode, using the at least two bits of data to select a color from a predefined color palette.

43. The method of claim 37, wherein computing the final pixel value includes:

when the current pixel is within both the icon region and the cursor region, using the icon pixel value when an icon enable signal is asserted, and using the cursor pixel value when a cursor enable signal is asserted.

44. The method of claim 37, wherein computing the final pixel value includes:

blending two or more pixel values selected from a group consisting of the icon pixel value, the cursor pixel value, and the desktop pixel value.

45. The method of claim 37, wherein computing the final pixel value includes:

performing a logical XOR operation on two values selected from a group of candidate pixel values, wherein the group of candidate pixel values consists of the icon pixel value, the cursor pixel value, and the desktop pixel value.

46. A method for providing a pixel value corresponding to a current pixel of a display, comprising:

receiving a desktop pixel value corresponding to the current pixel;

receiving a blank enable signal;

when the blank enable signal is in an asserted state, selecting a predefined blank-screen color value as the pixel value for all pixels of the display;

when the blank enable signal is not in the asserted state, selecting the desktop pixel value as the pixel value;

asserting an icon enable signal when a current pixel is within an icon region;

while the icon enable signal is asserted, performing the following acts;

determining an icon pixel value corresponding to the current pixel from hardware icon data stored in an icon memory; and

selecting the icon pixel value in preference to the selected one of the blank pixel value or the desktop pixel value.

47. The method of claim 46, further comprising:

detecting a locking action on a device that has the display for which pixel values are being provided;

in response to the locking action, setting the blank enable signal to the asserted state;

subsequently detecting an unlocking action on the device; and

in response to the unlocking action, setting the blank enable signal to a non-asserted state.

48. The method of claim 47, wherein setting the blank enable signal to the asserted state and setting the blank enable signal to the non-asserted state are performed without an action by an operating system of the device.

49. A device comprising:

a graphical display configured to display pixel data;

a compositor for providing pixel data corresponding to the current pixel to the graphical display, the compositor including;

a desktop pixel logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a first on-chip memory configured to store cursor data;

a second on-chip memory configured to store hardware icon data;

a cursor logic circuit configured to read the cursor data from the first on-chip memory and to generate a cursor pixel value corresponding to the current pixel when the current pixel is within a cursor region;

a hardware icon logic circuit configured to read the hardware icon data from the second on-chip memory and to generate an icon pixel value corresponding to the current pixel when the current pixel is within an icon region, the hardware icon logic circuit operating in either of a monochrome mode and a multicolor mode; and

a priority logic circuit configured to compute the final pixel value using one or more of the desktop pixel value, the cursor pixel value, or the icon pixel value and to provide the final pixel value to the graphical display, wherein the priority logic circuit is further configured such that when the current pixel is within both the icon region and the cursor region, the icon pixel value is used to compute the final pixel value in the event that an icon enable signal is asserted and the cursor pixel value is used to compute the final pixel value in the event that a cursor enable signal is asserted.

50. The device of claim 49, wherein

the hardware icon logic circuit is further configured to generate the icon enable signal;

and

the priority logic circuit is further configured such that the icon pixel value is not used to compute the final pixel value when the icon enable signal is not asserted.

51. The device of claim 50, wherein the hardware icon logic circuit includes:

a storage register configured to store an icon state indicator, wherein the icon enable signal is not asserted when the icon state indicator has an inactive value.

52. The device of claim 51, wherein the storage register is updated without interaction with an operating system.

53. The device of claim 49, wherein the hardware icon logic circuit is further configured to select a pixel of the hardware icon data to be read for the current pixel based in part on an icon magnification factor.

54. The device of claim 53, wherein the hardware icon logic circuit includes:

a plurality of storage registers configured to store icon position data and the icon magnification factor;

a first subcircuit configured to determine from a screen coordinate of the current pixel, the icon magnification factor, and the icon position data whether the current pixel is within the icon region, wherein the icon enable signal is not asserted when the current pixel is not within the icon region;

a second subcircuit configured to determine a local coordinate of the current pixel from the screen coordinate and the icon magnification factor; and

a third subcircuit configured to retrieve the icon pixel value from the second on-chip memory based on the local coordinate when the current pixel is within the icon region.

55. The device of claim 49, wherein the hardware icon logic circuit includes:

a first subcircuit configured to retrieve the hardware icon data from the second on-chip memory based on a local coordinate of the current pixel,

wherein the first subcircuit retrieves one bit of the hardware icon data in the monochrome mode and a plurality of bits of the hardware icon data in the multicolor mode.

56. The device of claim 55, wherein the multicolor mode is a palette color mode.

57. The device of claim 56, wherein the hardware icon logic circuit further includes:

a plurality of storage registers, each configured to store a color value; and

a multiplexer having a plurality of input terminals, each coupled to receive a color value from a respective one of the plurality of storage registers, a control terminal coupled to receive the hardware icon data retrieved by the memory controller in the multicolor mode, and an output terminal coupled to provide the icon pixel value.

58. The device of claim 49, further comprising:

a frame buffer for storing a first candidate desktop pixel value; and

a video overlay memory for storing a second candidate desktop pixel value.

59. The device of claim 58, wherein the desktop pixel logic circuit includes:

a first interface configured to receive the first candidate desktop pixel value;

a second interface configured to receive the second candidate desktop pixel value; and

a selection subcircuit configured to select one of the first and second candidate desktop pixel values as the desktop pixel value.

60. The device of claim 49, wherein the priority logic circuit is configured to compute the final pixel value at least in part by selecting one of the desktop pixel value, the cursor pixel value, and the icon pixel value.

61. The device of claim 49, wherein the priority logic circuit is configured to compute the final pixel value at least in part by blending two or more pixels selected from a group consisting of the desktop pixel value, the cursor pixel value, and the icon pixel value.

62. The device of claim 49, wherein the priority logic circuit is configured to compute the final pixel value by performing a logical XOR operation on two values selected from a group of candidate pixel values, wherein the group of candidate pixel values consists of the desktop pixel value, the cursor pixel value, and the icon pixel value.

63. A device comprising:

a graphical display configured to display pixel data;

a compositor for providing pixel data corresponding to the current pixel to the graphical display, the compositor including;

a desktop pixel logic circuit configured to supply a desktop pixel value corresponding to the current pixel;

a first register configured to store a blank-screen color value;

a second register configured to store a state of a blank enable signal;

a first selection circuit configured to select one of the desktop pixel value and the blank-screen color value to be provided in response to the state of the blank enable signal, wherein when the blank-enable signal is asserted, the blank-screen color value is selected over the desktop pixel value as the pixel value for all pixels of the graphical displays;

a hardware icon logic circuit configured to read hardware icon data from an on-chip memory, to supply an icon pixel value corresponding to the current pixel when the current pixel is within an icon region, and to generate an icon enable signal; and

a second selection circuit configured to receive the icon pixel value and the icon enable signal from the hardware icon circuit, to receive as an underlying pixel value the selected one of the desktop pixel value and the blank-screen color value, and to provide one of the icon pixel value and the underlying pixel value in response to the icon enable signal.

64. The device of claim 63, further comprising:

a user interface component including a control, wherein the state of the blank enable signal is changed in response to a user manipulation of the control.

65. The device of claim 63, wherein the state of the blank enable signal is changed without an action by an operating system.