Multi-mode crystal oscillator

• US 7,266,349 B2
• Filed: 08/06/2004
• Issued: 09/04/2007
• Est. Priority Date: 08/06/2004
• Status: Expired due to Fees

• Current Assignee: Avago Technologies International Sales Pte Limited (Broadcom, Inc.)
• Original Assignee: Broadcom Corporation (Broadcom, Inc.)
• Inventors: Kappes, Michael
• Primary Examiner(s): Nguyen; Simon
• Application Number:
  US10/912,858
• Publication Number:
  US 20060030358A1
• Time in Patent Office: 1,124 Days
• Field of Search: 455572-574, 4551274-1275, 455255-265, 4553431-3434
• US Class Current: 455/73
• CPC Class Codes: G06F 1/3203 Power management, i.e. event-based initiation of a power-saving mode
• CPC Class Codes: G06F 1/324 by lowering clock frequency
• CPC Class Codes: H03B 2200/0046 including measures to switch the gain of an amplifier
• CPC Class Codes: H03B 2200/005 including measures to switch a capacitor
• CPC Class Codes: H03B 2200/0052 including measures to switch the feedback circuit
• CPC Class Codes: H03B 2200/0094 Measures to ensure starting of oscillations
• CPC Class Codes: H03B 5/06 Modifications of generator to ensure starting of oscillations
• CPC Class Codes: H03B 5/366 and comprising means for varying the frequency by a variable voltage or current
• CPC Class Codes: H03K 3/0307 Stabilisation of output, e.g. using crystal
• CPC Class Codes: H03K 3/3545 Stabilisation of output, e.g. using crystal
• CPC Class Codes: H04W 52/029 reducing the clock frequency of the controller
• CPC Class Codes: Y02D 10/00 Energy efficient computing, e.g. low power processors, power management or thermal management
• CPC Class Codes: Y02D 30/70 in wireless communication networks

Abstract

In one embodiment of the present invention, two crystal oscillator circuits are coupled in parallel to provide differing performance according to mode. Generally, a first circuit provides low phase noise and high accuracy while a second circuit provides greater phase noise within an acceptable tolerance while consuming significantly less power in a low power mode of operation. The second circuit includes an entirely separate amplifier for the low power operation that tolerates a relatively smaller input signal swing but that consumes even less power. The first circuit, which comprises selectable amplification elements, and the second circuit are coupled in parallel with selectable resistive elements and capacitive elements to provide varying amounts of amplification and filtering according to whether an operational mode is in a startup mode, a normal mode, or a low power mode of operation.

Claims

1. A multi-mode oscillator comprising:

adjustable resistance block;

adjustable capacitance block;

first amplifier for operatively coupling to the adjustable resistance and capacitance blocks during startup and normal modes of operation; and

second amplifier for operatively coupling to the adjustable resistance and capacitance blocks during lower power modes of operation wherein the multi-mode oscillator operably adjusts at least one of gain level settings, resistive settings and capacitive settings based upon whether the transceiver is in a startup mode, a normal mode or a low power mode of operation.

2. The multi-mode oscillator of claim 1 wherein the multi-mode oscillator further includes a plurality of amplifiers for mutually exclusive operation that are oppositely biased on and off relative to each other.

3. The multi-mode oscillator of claim 2 further including switch logic to operatively couple transistors of the first and second amplifiers to set gain levels and to select operation thereof, to operatively couple resistors of the adjustable resistance block to adjust resistance, and to operatively couple capacitors of the adjustable capacitance block to adjust capacitance.

4. The multi-mode oscillator of claim 3 wherein, in a startup mode of operation, gain levels are maximized, and resistance and capacitance are minimized.

5. The multi-mode oscillator of claim 3 wherein, in a normal mode of operation, gain levels are optimized, resistance is maximized, and capacitance is tuned to match a crystal frequency.

6. The multi-mode oscillator of claim 3 wherein, in a low power mode of operation, gain levels are minimized, and resistance is maximized and capacitance is minimized.

7. The multi-mode oscillator of claim 6 wherein capacitance provided by capacitive devices is removed in a low power mode of operation.

8. The multi-mode oscillator of claim 7 wherein, in a low power mode of operation, a first amplifier having adjustable gain level settings is operatively decoupled and a second amplifier having low power consumption is operatively coupled to oscillator circuitry of the multi-mode oscillator.