Data transfer control device and electronic instrument generating interface signal of signal type according to interface information set in internal register

• US 7,266,629 B2
• Filed: 02/22/2005
• Issued: 09/04/2007
• Est. Priority Date: 03/09/2004
• Status: Expired due to Fees

• Current Assignee: 138 East LCD Advancements Limited (Vector Capital Corporation)
• Original Assignee: Seiko Epson Corporation (Seiko Group)
• Inventors: Honda, Hiroyasu
• Primary Examiner(s): Ray; Gopal C.
• Application Number:
  US11/063,007
• Publication Number:
  US 20050204087A1
• Time in Patent Office: 924 Days
• Field of Search: 710/305, 710/31, 710/33, 710/38, 710/100, 710/300, 710/316, 370/257, 370/229, 370/464, 370/351, 370/912, 370/915, 365/185.22, 379/100.17, 709230-233, 709/253
• US Class Current: 710/305
• CPC Class Codes: G06F 3/1423 controlling a plurality of local displays, e.g. CRT and flat panel display
• CPC Class Codes: G09G 2310/08 Details of timing specific for flat panels, other than clock recovery
• CPC Class Codes: G09G 2370/045 using multiple communication channels, e.g. parallel and serial
• CPC Class Codes: G09G 2370/047 using display data channel standard [DDC] communication
• CPC Class Codes: G09G 2370/10 Use of a protocol of communication by packets in interfaces along the display data pipeline
• CPC Class Codes: G09G 3/2092 Details of a display terminals using a flat panel, the details relating to the control arrangement of the display terminal and to the interfaces thereto suitable for both CRT and flat panel G09G5/003; specific for a CRT G09G1/165
• CPC Class Codes: G09G 3/2096 Details of the interface to the display terminal specific for a flat panel suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167
• CPC Class Codes: G09G 5/003 Details of a display terminal, the details relating to the control arrangement of the display terminal and to the interfaces thereto specific for a CRT G09G1/165; for a flat panel G09G3/2092
• CPC Class Codes: G09G 5/006 Details of the interface to the display terminal specific for a display terminal using a CRT G09G1/167; using a flat panel G09G3/2096; circuits for interfacing with colour displays G09G5/04
• CPC Class Codes: Y10S 370/912 Packet communications

Abstract

A data transfer control device including: a link controller which analyzes a received packet transferred from a host-side data transfer control device through a serial bus; an interface circuit which generates interface signals and outputs the generated interface signals to an interface bus; and an internal register in which is set interface information for specifying signal types of the interface signals output from the interface circuit. The interface circuit includes first to Nth interface circuits (N is an integer greater than one), and each of the first to Nth interface circuits generates an interface signal of a signal type according to the interface information set in the internal register.

Claims

1. A data transfer control device which controls data transfer, the data transfer control device comprising:

a link controller which analyzes a received packet transferred from a host-side data transfer control device through a serial bus;

an interface circuit which generates interface signals and outputs the generated interface signals to an interface bus; and

an internal register in which interface information is set, the interface information being used for specifying signal types of the interface signals output from the interface circuit,

wherein the interface circuit includes first to Nth interface circuits (N is an integer greater than one), each of the first to Nth interface circuits generating an interface signal of a signal type according to the interface information set in the internal register.

2. The data transfer control device as defined in claim 1,

wherein the interface information is set in the internal register based on a packet transferred from the host-side data transfer control device through the serial bus.

3. The data transfer control device as defined in claim 2, wherein:

a packet having data in a data field is transferred from the host-side data transfer control device through the serial bus after the interface information has been set in the internal register; and

each of the first to Nth interface circuits outputs an interface signal including a signal of the data set in the packet in a signal type according to the interface information set in the internal register.

4. An electronic instrument, comprising:

the target-side data transfer control device as defined in claim 3;

a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

5. An electronic instrument, comprising:

the target-side data transfer control device as defined in claim 2;

a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

6. The data transfer control device as defined in claim 1, wherein:

a packet transferred from the host-side data transfer control device through the serial bus includes a port number field for selling a port number; and

each of the first to Nth interface circuits outputs an interface signal to a port as destination, the port having been selected from among ports of one or more devices connected to the interface bus based on the port number set in the packet.

7. An electronic instrument, comprising:

the target-side data transfer control device as defined in claim 6;

a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

8. The data transfer control device as defined in claim 1, wherein:

the interface circuit includes a multiplexer having inputs to which outputs of the first to Nth interface circuits are connected, and having an output to which the interface bus is connected; and

the multiplexer selects one of the first to Nth interface circuits, and outputs an interface signal generated by the selected one of the first to Nth interface circuits to the interface bus.

9. An electronic instrument, comprising:

the target-side data transfer control device as defined in claim 8;

a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

10. The data transfer control device as defined in claim 1,

wherein the first to Nth interface circuits include an RGB interface circuit which generates an interface signal for an RGB interface, an MPU interface circuit which generates an interface signal for an MPU interface, and a serial interface circuit which generates an interface signal for a serial interface.

11. An electronic instrument, comprising:

the target-side data transfer control device as defined in claim 10;

a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

12. An electronic instrument, comprising:

the target-side data transfer control device as defined in claim 1;

a host-side data transfer control device connected to the target-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

13. A data transfer control device which controls data transfer, the data transfer control device comprising:

an interface circuit which performs interface processing between the data transfer control device and a system device;

a link controller which generates a packet to be transmitted to a target-side data transfer control device through a serial bus; and

an internal register accessed by the system device through the interface circuit

wherein interface information for specifying signal types of interface signals output from another interface circuit of the target-side data transfer control device is set in the internal register by the system device; and

wherein the link controller generates a packet having the interface information set in the internal register, and transmits the packet to the target-side data transfer control device through the serial bus.

14. The data transfer control device as defined in claim 13, wherein:

the internal register includes a register transfer start register; and

the link controller generates the packet having the interface information set in the internal register when the system device has instructed start of transfer by using the register transfer start register, and transmits the packet to the target-side data transfer control device through the serial bus.

15. An electronic instrument, comprising:

the host-side data transfer control device as defined in claim 14;

a target-side data transfer control device connected to the host-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

16. The data transfer control device as defined in claim 13,

wherein the link controller generates a packet having data in a data field and transmits the generated packet to the target-side data transfer control device after transmitting the packet having the interface information to the target-side data transfer control device.

17. An electronic instrument, comprising:

the host-side data transfer control device as defined in claim 16;

a target-side data transfer control device connected to the host-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.

18. An electronic instrument, comprising:

the host-side data transfer control device as defined in claim 13;

a target-side data transfer control device connected to the host-side data transfer control device through the serial bus; and

one or more devices connected to the target-side data transfer control device through the interface bus.