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Programmable logic device including programmable interface core and central processing unit

  • US 7,266,632 B2
  • Filed: 06/14/2006
  • Issued: 09/04/2007
  • Est. Priority Date: 05/18/2001
  • Status: Expired due to Term
First Claim
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1. A system comprising a programmable logic device having an embedded microprocessor, wherein the programmable logic device comprises:

  • a programmable interface coupled to the microprocessor, wherein the programmable interface includes a core designated by a user;

    wherein the programmable interface includes a crosspoint switch for coupling the plurality of devices;

    a peripheral bus coupled to the programmable interface via the crosspoint switch;

    wherein the crosspoint switch includes a plurality of address/control paths and a corresponding plurality data paths, and the address/control paths include one or more pipeline registers at like locations in the paths, and the data paths include one or more pipeline registers at like locations in the paths;

    a plurality of devices including a first subset coupled to the programmable interface and a second subset coupled to the peripheral bus, each device for one of providing information to the microprocessor via the programmable interface, receiving information from the microprocessor via the programmable interface, and communicating with another device via the programmable interface.

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