Thick porous anodic alumina films and nanowire arrays grown on a solid substrate

• US 7,267,859 B1
• Filed: 11/25/2002
• Issued: 09/11/2007
• Est. Priority Date: 11/26/2001
• Status: Expired due to Fees

• Current Assignee: Massachusetts Institute of Technology
• Original Assignee: Massachusetts Institute of Technology
• Inventors: Herz, Paul R., Lin, Yu-Ming, Rabin, Oded, Dresselhaus, Mildred S., Akinwande, Akintunde I.
• Primary Examiner(s): Nordmeyer; Patricia L.
• Application Number:
  US10/303,653
• Publication Number:
  US 20070224399A1
• Time in Patent Office: 1,751 Days
• Field of Search: 428/131, 428/472.2, 428/606, 428/614, 428/629, 430/312, 430/314, 430/318, 205/198, 205/212, 205/260
• US Class Current: 428/131
• CPC Class Codes: B82Y 30/00 Nanotechnology for materials or surface science, e.g. nanocomposites
• CPC Class Codes: C23C 14/024 Deposition of sublayers, e.g. to promote adhesion of the coating C23C14/027 takes precedence
• CPC Class Codes: C23C 14/16 on metallic substrates or on substrates of boron or silicon
• CPC Class Codes: C23C 14/5873 Removal of material
• CPC Class Codes: C30B 29/605 Products containing multiple oriented crystallites, e.g. columnar crystallites
• CPC Class Codes: C30B 7/00 Single-crystal growth from solutions using solvents which are liquid at normal temperature, e.g. aqueous solutions from molten solvents C30B9/00; by normal or gradient freezing C30B11/00; under a protective fluid C30B27/00
• CPC Class Codes: C30B 7/005 Epitaxial layer growth
• CPC Class Codes: H10N 10/01 Manufacture or treatment
• CPC Class Codes: H10N 10/17 characterised by the structure or configuration of the cell or thermocouple forming the device
• CPC Class Codes: Y10T 156/10 Methods of surface bonding and/or assembly therefor
• CPC Class Codes: Y10T 428/12486 Laterally noncoextensive components [e.g., embedded, etc.]
• CPC Class Codes: Y10T 428/1259 Oxide
• CPC Class Codes: Y10T 428/24273 including aperture
• CPC Class Codes: Y10T 428/24322 Composite web or sheet
• CPC Class Codes: Y10T 428/24917 including metal layer

Abstract

The presently disclosed invention provides for the fabrication of porous anodic alumina (PAA) films on a wide variety of substrates. The substrate comprises a wafer layer and may further include an adhesion layer deposited on the wafer layer. An anodic alumina template is formed on the substrate. When a rigid substrate such as Si is used, the resulting anodic alumina film is more tractable, easily grown on extensive areas in a uniform manner, and manipulated without danger of cracking. The substrate can be manipulated to obtain free-standing alumina templates of high optical quality and substantially flat surfaces PAA films can also be grown this way on patterned and non-planar surfaces. Furthermore, under certain conditions the resulting PAA is missing the barrier layer (partially or completely) and the bottom of the pores can be readily accessed electrically. The resultant film can be used as a template for forming an array of nanowires wherein the nanowires are deposited electrochemically into the pores of the template. By patterning the electrically conducting adhesion layer, pores in different areas of the template can be addressed independently, and can be filled electrochemically by different materials. Single-stage and multi-stage nanowire-based thermoelectric devices, consisting of both n-type and p-type nanowires, can be assembled on a silicon substrate by this method.

Claims

1. A device comprising:

a non-aluminum substrate;

an adhesion layer disposed over the non-aluminum substrate, wherein said adhesion layer consists essentially of a multi-layer structure of SiO₂/Ti/Pt; and

a porous anodic alumina template formed on the adhesion layer of said substrate.

2. The device of claim 1 further comprising a plurality of nanowires formed within said template.

3. The device of claim 2 further comprising a layer of material deposited on a top surface of said template.

4. The device of claim 3 further comprising patterning said layer deposited on a top surface of said template.

5. The device of claim 3 wherein at least some of said nanowires are connected to said layer of material deposited on a top surface of said template.

6. The device of claim 3 wherein at least some of said nanowires are connected to said substrate and to said layer of material deposited on a top surface of said template.

7. The device of claim 3 wherein none of said nanowires is connected to said substrate and none of said nanowires is connected to said layer of material deposited on a top surface of said template.

8. The device of claim 2 wherein said plurality of nanowires is formed by filling pores of said template with nanowire material.

9. The device of claim 8 wherein said nanowire material is selected from the group including:

metals, semiconductors, oxides, polymers and layers of at least two of said metals, semiconductors, oxides and polymers arranged along at least one of a radial dimension and an axial dimension.

10. The device of claim 2 wherein at least some of said nanowires are connected to said substrate.

11. The device of claim 2 wherein said plurality of nanowires comprises a first set of nanowires of a first material and at least one more set of nanowires of at least one other material.

12. The device of claim 11 wherein said first material is provided as a first semi-conductor material doped to a predetermined dopant level by introduction of an n-type dopant material into said first material.

13. The device of claim 11 wherein said at least one other material is provided as a second semi-conductor material doped to a predetermined dopant level by introduction of a p-type dopant material into said at least one other material.

14. The device of claim 1 wherein said substrate is selected from the group including:

a silicon wafer, an oxidized silicon wafer, and a glass slide.

15. The device of claim 1 wherein said substrate comprises a non-planar substrate.

16. The device of claim 1 wherein said template is formed without a barrier layer.

17. The device of claim 1 wherein said template is formed with a barrier layer, and said barrier layer is at least partially removed by a process that does not substantially change any other component of said device.

18. The device of claim 17 wherein said process is one of electrochemical generation of gas between said barrier layer and said substrate, and electrochemical generation of an alumina etchant in the proximity of said barrier layer.

19. The device of claim 1 wherein said template has a thickness between 50 nm and 500 microns.

20. The device of claim 1 wherein said template has pores of approximately cylindrical shape;

and the ratio of the length of said pores to the diameter of said pores is between 1 and 2500.

21. The device of claim 1 wherein said template is processed.

22. The device of claim 1 wherein said template has widened pores with diameters larger than the diameters of the pores obtained by anodization without further processing.

23. The device of claim 1 wherein said template is patterned to obtain a shaped template differing in shape from the template obtained by anodization without further processing.

24. The device of claim 1 wherein all surface areas of said template, excluding the pore openings, are provided having a surface with a root-mean-square surface roughness of approximately 5.5 Angstrom.

25. The device of claim 1 wherein said substrate further comprises a conductive layer disposed on at least a portion of said substrate.

26. The device of claim 25 wherein said conductive layer comprises a material that oxidizes at a relatively slow rate under anodization conditions.

27. The device of claim 25 wherein said conductive layer comprises a layer of a noble metal film atop other films.

28. The device of claim 25 wherein said conductive layer is patterned.

29. The device of claim 25 wherein said template includes a plurality of pores in which a first group of said plurality of pores terminates at a barrier layer over said substrate and a second group of said plurality of pores is open over said conductive layer.

30. The device of claim 1 further comprising:

a barrier layer disposed at an interface between said porous anodic alumina (PAA) template and a top surface of said adhesion layer.

31. The device of claim 1 wherein said substrate comprises a rigid material suitable for processing.

32. The device of claim 1 further comprising a layer of material deposited on said substrate.

33. The device of claim 32 wherein said layer of material is at least one of the group including layers of adhesion promoting materials, layers with electrically conducting surfaces, and layers with electrically insulating surfaces.

34. The device of claim 32 wherein said layer of material is patterned.

35. A device comprising:

a wafer;

an adhesion layer provided on a top surface of said wafer, said adhesion layer consisting essential of a multi-layer structure of SiO₂/Ti/Pt;

a porous anodic alumina film disposed on said adhesion layer; and

a plurality of nanowires disposed in said porous anodic alumina film.

36. The device of claim 35 further comprising of at least one layer disposed on top of said porous anodic alumina film.

37. The device of claim 36 wherein at least one of said nanowires is connected to said at least one layer.

38. The device of claim 36 wherein at least one of said nanowires is connected to said adhesion layer and to said at least one layer.

39. The device of claim 36 wherein none of said nanowires is connected to said adhesion layer and none of said nanowires is connected to said at least one layer.

40. The device of claim 36 wherein at least one of said nanowires and vacant pores of said porous anodic alumina film are addressable by at least one of said adhesion layer and said at least one layer.

41. The device of claim 35 wherein at least one of said nanowires is connected to said adhesion layer.

42. The device of claim 35 wherein said plurality of nanowires comprises a first set of nanowires of a first material and at least one more set of nanowires of at least one other material.

43. A multistage device comprising:

a first stage comprising;

a wafer;

a first adhesion layer provided on a top surface of said wafer, said adhesion layer consisting essentially of a multi-layer structure of SiO₂Ti/Pt;

a porous anodic alumina film disposed on said first adhesion layer;

a first plurality of nanowires disposed in said porous anodic alumina film; and

at least one layer disposed on top of said porous anodic alumina film; and

at least one additional stage, each of said at least one additional stage comprising;

a second adhesion layer provided on a top surface of a previous stage;

a second porous anodic alumina film disposed on said second adhesion layer;

a second plurality of nanowires disposed in said second porous anodic alumina film; and

at least one second layer disposed on top of said second porous anodic alumina film.

44. The device of claim 43 wherein at least one of said first and second plurality of nanowires is connected to one of said first and second adhesion layer.

45. The device of claim 43 wherein at least one of said first and second plurality nanowires is connected to one of said at least one layer and said at least one second layer.

46. The device of claim 43 wherein at least one of said first and second plurality of nanowires is connected to one of said first and second adhesion layer and to one of said at least one layer and said at least one second layer.

47. The device of claim 43 wherein none of said first and second plurality of nanowires is connected to said first adhesion layer, said second adhesion layer, said at least one layer and said at least one second layer.

48. The device of claim 43 wherein at least one of said nanowires and vacant pores of said porous anodic alumina film are addressable by at least one of said first adhesion layer, said second adhesion layer, said at least one layer and said at least one second layer.

49. The device of claim 43 wherein at least one of said first and second plurality of nanowires comprises a first set of nanowires of a first material and at least one more set of nanowires of at least one other material.