Quadrature voltage controlled oscillators with phase shift detector

• US 7,271,622 B2
• Filed: 06/22/2006
• Issued: 09/18/2007
• Est. Priority Date: 06/10/2004
• Status: Active Grant

• Current Assignee: Theta IP, LLC
• Original Assignee: Theta Microelectronics, Inc.
• Inventors: Metaxakis, Emmanuel
• Primary Examiner(s): LE, DINH THANH
• Application Number:
  US11/473,620
• Publication Number:
  US 20060238259A1
• Time in Patent Office: 453 Days
• Field of Search: 327 2- 3, 327 7- 8, 327/147, 327/156, 327/12, 331/46, 331/117.R, 331/172, 331/48
• US Class Current: 327/12
• CPC Class Codes: H03B 2201/025 the means being an electronic switch for switching in or out oscillator elements
• CPC Class Codes: H03B 27/00 Generation of oscillations providing a plurality of outputs of the same frequency but differing in phase, other than merely two anti-phase outputs
• CPC Class Codes: H03B 5/1215 the current source or degeneration circuit being in common to both transistors of the pair, e.g. a cross-coupled long-tailed pair
• CPC Class Codes: H03B 5/1231 the amplifier comprising one or more bipolar transistors
• CPC Class Codes: H03B 5/124 the means comprising a voltage dependent capacitance
• CPC Class Codes: H03J 2200/10 Tuning of a resonator by means of digitally controlled capacitor bank
• CPC Class Codes: H03L 7/00 Automatic control of frequency or phase; Synchronisation

Abstract

In wireless application there is made use of a quadrature oscillators that generate signals that are capable of oscillating at quadrature of each other. The quadrature oscillator is comprised of two differential modified Colpitts oscillators. A capacitor bank allows for the selection of a desired frequency from a plurality of discrete possible frequencies. The quadrature oscillator is further coupled with a phase-error detector connected at the point-of-use of the generated ‘I’ and ‘Q’ channels and through the control of current sources provides corrections means to ensure that the phase shift at the point-of-use remains at the desired ninety degrees.

Claims

1. A phase error detector (PED) for detecting a phase error in a quadrature signal, said PED comprising:

a first analog OR gate having an input for receiving a positive in-phase (‘

I’

) signal and a positive quadrature-phase (‘

Q’

) signal;

a second analog OR gate having an input for receiving a negative ‘

I’

signal and a negative ‘

Q’

signal;

first circuitry for summing the output from said first analog OR gate and said second analog OR gate to generate a first circuitry output;

a third analog OR gate having an input for receiving a positive ‘

I’

signal and a negative ‘

Q’

signal;

a fourth analog OR gate having a first input for receiving a negative ‘

I’

signal and a positive ‘

Q’

signal; and

,

second circuitry for summing the output from said third analog OR gate and said fourth analog OR gate and there from generating a second circuitry output;

whereby the difference between said first circuitry output and said second circuitry output is a signal proportional to a phase error between the ‘

I’

signal and the ‘

Q’

signal of the quadrature signal.

2. The PED of claim 1 wherein said PED further comprises an integrator responsive the difference between said first circuitry output and said second circuitry output.

3. The PED of claim 2 wherein said analog OR gate comprises of a first and a second bipolar transistors, having coupled emitters and coupled collectors, said emitters further being coupled to a constant current source.

4. The PED of claim 1 wherein said PED is implemented in one of the processing technologies of:

bipolar, BiCMOS, CMOS.

5. The PED of claim 1 wherein said positive ‘

I’

signal and said negative ‘

I’

signal are received from a first oscillator and said positive ‘

Q’

signal and said negative ‘

Q’

signal are received from a second oscillator.

6. The PED of claim 5 wherein said positive ‘

I’

signal and said negative ‘

I’

signal of said first oscillator are fed into said second oscillator.

7. The PED of claim 5 wherein said positive ‘

Q’

signal and said negative ‘

Q’

signal of said second oscillator are fed into said first oscillator.

8. The PED of claim 1 wherein said wherein said positive ‘

I’

signal, said negative ‘

I’

signal, said positive ‘

Q’

signal and said negative ‘

Q’

signal, are provided from a quadrature voltage controlled oscillator.

9. A method for detecting a phase error in a quadrature signal comprising:

providing a first analog OR gate with a positive in-phase (‘

I’

) signal and a positive quadrature-phase (‘

Q’

) signal;

providing a second analog OR gate with a negative ‘

I’

signal and a negative ‘

Q’

signal;

summing the output from said first analog OR gate and the output of said second analog OR gate to generate a first circuitry output;

providing a third analog OR gate with a positive ‘

I’

signal and a negative ‘

Q’

signal;

providing a fourth analog OR gate with negative ‘

I’

signal and a positive ‘

Q’

signal;

summing the output from said third analog OR gate and said fourth analog OR gate to generate a second circuitry output; and

,

using the difference between said first circuitry output and said second circuitry output to determine the phase error between the ‘

I’

signal and the ‘

Q’

signal of the quadrature signal.

10. The method of claim 9 further comprising:

integrating the difference between said first circuitry output and said second circuitry output over a period of time.