Method of producing a micro-electromechanical element

• US 7,273,763 B1
• Filed: 09/29/1999
• Issued: 09/25/2007
• Est. Priority Date: 12/15/1998
• Status: Expired due to Fees

• Current Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Original Assignee: Fraunhofer Gesellschaft Zur Foerderung Der Angewandten Forsching E.V.
• Inventors: Bollmann, Dieter, Neumeier, Karl
• Primary Examiner(s): Le; Thao P.
• Application Number:
  US09/868,156
• Time in Patent Office: 2,918 Days
• Field of Search: 438/52, 438/53, 438/51
• US Class Current: 438/52
• CPC Class Codes: G01L 13/025 using diaphragms
• CPC Class Codes: G01L 9/0042 Constructional details associated with semiconductive diaphragm sensors, e.g. etching, or constructional details of non-semiconductive diaphragms details about the integration or bonding of piezoresistor in or on the diaphragm G01L9/0052 and G01L9/0057 respectively
• CPC Class Codes: G01L 9/0054 integral with a semiconducting diaphragm
• CPC Class Codes: G01L 9/0055 bonded on a diaphragm
• CPC Class Codes: G01L 9/0073 using a semiconductive diaphragm
• CPC Class Codes: G01P 15/0802 Details

Abstract

In a method of producing a micro-electromechanical element a first intermediate layer, which is applied to a first main surface of a first semiconductor wafer, is structured in a first step so as to produce a recess. The first semiconductor wafer is connected via the first intermediate layer to a second semiconductor wafer in such a way that a hermetically sealed cavity is defined by the recess. When one of the wafers has been thinned from a surface facing away from said first intermediate layer so as to produce a diaphragm-like structure on top of the cavity, electronic components are produced in said thinned semiconductor wafer making use of standard semiconductor processes. At least one further intermediate layer between the two semiconductor wafers is provided, which, prior to the connection of the two semiconductor wafers, is structured in such a way that the structure formed in said at least one further intermediate layer and the recess in said first intermediate layer define the cavity. Finally at least one defined opening is produced so as to provide access to the hermetically sealed cavity.

Claims

1. A method of producing a micro-electromechanical element comprising the following steps:

a) structuring a first intermediate layer, which is applied to a first main surface of a first semiconductor wafer, so as to produce a recess;

b) connecting the first semiconductor wafer via the first-intermediate layer to a second semiconductor wafer in such a way that a hermetically sealed cavity is defined by the recess;

c) thinning one of the wafers from a surface facing away from said first intermediate layer so as to produce a diaphragm-like structure on top of the cavity;

d) producing electronic components in said thinned semiconductor wafer;

wherein in step a) the intermediate layer is structured in such a way that, when the two wafers have been connected, at least two hermetically sealed cavities are defined, which are interconnected by a channel, a respective diaphragm-like structure being arranged on top of each of said cavities after step c),

and wherein the method additionally comprises the step e) of opening a defined opening through the diaphragm-like structure on top of one of the cavities.

2. A method according to claim 1, wherein the main surface of the second semiconductor wafer, which is connected to the first semiconductor wafer via the intermediate layer, has applied thereto a second intermediate layer prior to the connecting step.

3. A method according to claim 2, wherein the second intermediate layer is structured in such a way that, after the connecting step, the structure formed in the second intermediate layer and the recess in the first intermediate layer define the cavity.

4. A method according to claim 1, wherein a cavity with areas of variable height is produced due to the use of a plurality of intermediate layers.

5. A method according to claim 1, wherein the first and the second wafer consist of silicon.

6. A method according to claim 1, wherein said intermediate layer consists of an oxide, a polysilicon, a nitride or of metal.

7. A method according to claim 1, wherein the connection in step b) is carried out in a vacuum.

8. A method according to claim 1, wherein an SOI wafer is used as a first and/or second wafer.

9. A method according to claim 1, wherein said at least one defined opening is produced in the diaphragm-like structure by means of a needle, a blade, by the use of a pulsed laser radiation or by etching.

10. A method according to claim 1, wherein the channel is structured in the fashion of a labyrinth in step a) in such a way that disturbing products formed during the production of the opening are prevented from passing said channel.