Autonomic embedded computing “dynamic storage subsystem morphing”

• US 7,275,181 B2
• Filed: 03/16/2004
• Issued: 09/25/2007
• Est. Priority Date: 03/26/2003
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Staiger, Dieter
• Primary Examiner(s): Beausoliel; Robert
• Assistant Examiner(s): Ehne; Charles
• Application Number:
  US10/801,203
• Publication Number:
  US 20040205386A1
• Time in Patent Office: 1,288 Days
• Field of Search: 714/6, 714 11- 13, 714/702, 701/33, 701/36, 701/39, 700/4, 700/5, 711/153
• US Class Current: 714/13
• CPC Class Codes: H04L 1/22 using redundant apparatus to increase reliability

Abstract

A Dynamic Storage Subsystem Morphing (DSSM) mechanism (40) is connected to a plurality of storage subsystem resources, which reserve some storage area each non-donor ECU (12), ready for a “slot-down/up” access by a respective non-donor ECU having a storage subsystem (24) breakdown. The slot-down process enables the use of a high physical address range by the non-donor processor provided with addressing capabilities sufficient only for addressing lower ranges.

Claims

1. A method for operating an embedded system covering a plurality of technical applications, the operative functions of which are performed with a respective plurality of application-specific Electronic Control Units (ECUs), wherein each ECU having separate need of resources regarding at least processing and storage subsystems, the method characterized by the steps of:

a) operating a preselected one of said ECUs as a “

donor”

ECU being provided with predefined storage subsystem resources; and

b) in case of a breakdown of either a storage subsystem or processing subsystem of a “

non-donor”

ECU donating respective predefined resources corresponding to either a broken down storage subsystem or a broken down processing subsystem from said “

donor”

ECU to said “

non-donor”

ECU wherein either an unbroken down storage subsystem or an unbroken down processing subsystem remains, and wherein the “

non-donor”

ECU retains the corresponding unbroken down processing subsystem or the corresponding unbroken down storage subsystem.

2. The method according to claim 1 further comprising the steps of:

a) operating a preselected one of said ECUs as a “

donor”

ECU with a storage subsystem being increased for some predetermined degree,

b) reserving for at least one non-donor ECU of said ECUs a respective predetermined storage area in the storage subsystem primarily associated with said preselected donor ECU of said plurality of ECUs;

c) providing to each non-donor ECU an access to a respective one of said reserved storage areas;

d) monitoring the operation of said ECUs, in case of breakdown of a non-donor ECU storage subsystem breakdown;

e) transforming addresses associated with said reserved storage area to new addresses adapted for being accessible by said non-donor ECU; and

f) assigning access to said non-donor ECU to a respective one of said reserved storage areas (50) by using said transformed new address.

3. The method according to claim 1, in which a split-cycle mode operation is performed in which in one memory operation cycle of the donor-ECU the donor ECU and one non-donor ECU access the same storage subsystem.

4. The method according to claim 1, further in case of breakdown of a non-donor ECU processor breakdown comprising the step of:

operating said donor ECU in a shared-processor mode, in which a predetermined controllable extent of donor-ECU processor resources is used to run applications, which have run at said non-donor ECU before its breakdown.

5. The method according to claim 1, in which the donor ECU is a human interface Multimedia unit, and a non-donor ECU is a real-time ECU having a considerable lower storage need than the donor ECU.

6. The method according to claim 1, in which a breakdown is defined by errors limitedly resulting in a non-successful operation of a subtotal of applications running in an ECU.

7. The method according to claim 2, comprising the step of reserving said storage area (SO) by hardware means, by processor-specific memory management means, operation system specific means, or middleware-specific means.

8. The method according to the preceding claim 3, in which write and read accesses are performed permanently to both, the respective own donor-ECU storage subsystem and to a respective reserved area in the donor-ECU subsystem, and said split-cycle operation mode is performed permanently.

9. The method according to claim 8, further comprising the steps of:

in a split cycle comparing read data of a non-donor ECU and respective redundant read data from said respective reserved storage area in said donor-ECU; and

if read data is not identical, initiating predetermined error management.

10. An embedded system having means for performing the steps of a method according to any of claims 1 to 9, comprising a hardware logic circuit connectable between a donor ECU and a non-donor ECU said hardware logic circuit comprising logic means for implementing the donating functions.

11. An embedded system comprising a hardware logic circuit (40) connectable between a donor ECU and a non-donor ECU, said hardware logic circuit comprising logic means for implementing the donating functions, in which said hardware logic circuit comprises:

a) an autonomic system control means implementing system faults handling means operatively connected to

b) a DSSM signal control circuit connected for implementing the multiplexing of storage accesses and the address transforming operations, and to

c) a split-cycle timing generator connected for implementing a shared access to said donor ECU storage subsystem;

said system having means for performing the steps of a method covering a plurality of technical applications, the operative functions of which are performed with a respective plurality of application-specific Electronic Control Units (ECU), each ECU having separate need of resources regarding at least processing and storage subsystem, characterized by the steps of;

a) operating a preselected one of said ECUs as a “

donor”

ECU being provided with predefined storage subsystem resources; and

b) in case of a breakdown of either a storage subsystem or processing subsystem of a “

non-donor”

ECU donating respective predefined resources corresponding to either a broken down storage subsystem or a broken down processing subsystem from said “

donor”

ECU to said “

non-donor”

ECU, wherein either an unbroken down storage subsystem or an unbroken down processing subsystem remains, and wherein the “

non-donor”

ECU retains the corresponding unbroken down processing subsystem or the corresponding unbroken down storage subsystem;

in which a split-cycle mode operation is performed in which in one memory operation cycle of the donor-ECU the donor ECU and one non-donor ECU access the same storage subsystem; and

in which write and read accesses are performed permanently to both, the respective own donor-ECU storage subsystem and to a respective reserved area in the donor-ECU subsystem, and said split-cycle operation mode is performed permanently.

12. The embedded system according to claim 11 in which a multiplexer means is provided within said DSSM signal control circuit for assigning access to said non-donor ECU to a respective one of said reserved storage areas, which is implemented as a FET switch array.

13. The embedded system according to claim 12 in which said autonomic system control means is implemented in a programmable ASIC.