Reference voltage generation using compensation current method
First Claim
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1. An apparatus for generating a stable voltage reference from a reference voltage (VREF), the apparatus comprising:
- a parasitic resistance that is coupled between a first node and a second node;
a first resistance circuit that is coupled between the second node and a third node, wherein the third node is associated with a signal ground;
a voltage reference circuit that is arranged to provide a first input reference voltage (VREFP) to the first node and a second input reference voltage (VREFN) to the third node such that the difference between the first input reference voltage (VREFP) and the second input reference voltage (VREFN) is responsive to the reference voltage (VREF);
a control circuit that is arranged to provide a first control signal (CTLP) such that;
the first control signal (CTLP) is responsive to changes from the reference voltage (VREF), wherein the control circuit includes a second resistance circuit that is arranged such that a voltage across the second resistance circuit is substantially equal to the reference voltage (VREF), and arranged such that the first control signal (CTLP) is responsive to changes in operational characteristics of the second resistance circuit and changes in the reference voltage (VREF; and
a first controlled current source (ICOM—
P) that is coupled between a power supply terminal and the second node, wherein the first controlled current source (ICOMP—
P) is responsive to the first control signal (CTLP) such that the voltage drop across the first resistance circuit is maintained, wherein the effect of the parasitic resistance is mitigated by operating the first controlled current source (ICOMP—
P) in an open loop configuration with respect to the first input reference voltage (VREFP).
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Abstract
A reference voltage generator that may be useful in analog-to-digital converter (ADC) circuits includes compensation for errors such as from non-ideal considerations such as semiconductor processing variations, mismatch errors, temperature gradients, and parasitic effects. The compensation method employs a correction current that is provided to the reference voltage generator to adjust the delay time and stability of the resulting reference voltage or voltages.
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Citations
20 Claims
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1. An apparatus for generating a stable voltage reference from a reference voltage (VREF), the apparatus comprising:
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a parasitic resistance that is coupled between a first node and a second node; a first resistance circuit that is coupled between the second node and a third node, wherein the third node is associated with a signal ground; a voltage reference circuit that is arranged to provide a first input reference voltage (VREFP) to the first node and a second input reference voltage (VREFN) to the third node such that the difference between the first input reference voltage (VREFP) and the second input reference voltage (VREFN) is responsive to the reference voltage (VREF); a control circuit that is arranged to provide a first control signal (CTLP) such that;
the first control signal (CTLP) is responsive to changes from the reference voltage (VREF), wherein the control circuit includes a second resistance circuit that is arranged such that a voltage across the second resistance circuit is substantially equal to the reference voltage (VREF), and arranged such that the first control signal (CTLP) is responsive to changes in operational characteristics of the second resistance circuit and changes in the reference voltage (VREF; anda first controlled current source (ICOM — P) that is coupled between a power supply terminal and the second node, wherein the first controlled current source (ICOMP— P) is responsive to the first control signal (CTLP) such that the voltage drop across the first resistance circuit is maintained, wherein the effect of the parasitic resistance is mitigated by operating the first controlled current source (ICOMP— P) in an open loop configuration with respect to the first input reference voltage (VREFP). - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10)
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11. An apparatus for generating a stable voltage reference from a reference voltage (VREF), the apparatus comprising:
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a voltage reference circuit that is arranged to provide a first note reference voltage (VREFP) a first node and a second input reference voltage (VREFN) to a second node in response to the reference voltage (VREF); a first parasitic resistance that is coupled between the first node and a third node; a second parasitic resistance that is coupled between the second node and a fourth node; a first resistor array circuit that is coupled between the third node and the fourth node; a second resistor array circuit that is coupled between a fifth node and a sixth node, wherein the first resistor array circuit is matched in operational performance with the second resistor array circuit; a first amplifier circuit that is arranged to adjust an internal control signal in response to a comparison between an internal reference voltage (VREFX) and the reference voltage (VREF); a first transistor circuit that is arranged to control a current flow through the second resistor array circuit in response to the internal control signal such that the internal reference signal is generated as a voltage across the second resistor array; a second transistor circuit that is arranged to provide a first control signal and a second control signal in response to the current flow through the second resistor array circuit; a first controlled current source (ICOMP — P) that is arranged to provide a first current to the third node in response to the first control signal (CTLP); anda second controlled current source (ICOMP — N) that is arranged to provide a second current to the fourth node in response to the second control signal (CTLN), wherein the first and second controlled current sources (ICOM— P, ICOMP— N) are arranged in cooperation with the voltage reference circuit and the first resistor array circuit to maintain a substantially constant voltage drop across the first resistor array circuit. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18)
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19. An apparatus for generating a stable voltage reference from a reference voltage (VREF), the apparatus comprising:
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a means for generating a first difference voltage between a first node and a second node in response to the reference voltage (VREF); a means for coupling the first node to a third node; a means for coupling the second node to a fourth node; a first resistor means that is coupled between the third node and the fourth node; a first controlled current means that is arranged to provide a first controlled current to the third node in response to a first control signal; a second controlled current means that is arranged to provide a second controlled current to the fourth node in response to a second control signal; a second resistor means that is coupled between a fifth node and a sixth node, wherein the operational characteristics of the second resistor means is matched to the first resistor means; a first control means that is arranged to;
maintain second difference voltage between the fifth node and the sixth node in response to the reference voltage (VREF); anda current sense means that is arranged to sense a current flow in the second resistor means and generate the first control signal and the second control signal.
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20. A method for generating a plurality of stable reference voltages from a reference voltage (VREF), the method comprising:
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generating a first difference voltage between a first node and a second node in response to the reference voltage (VREF); coupling the first node to a third node; coupling the second node to a fourth node; coupling a first current to the third node in response to a first control signal; coupling a second current to the fourth node in response to a second control signal; setting the plurality of stable reference voltages with a first resistor array that is coupled between the third node and the fourth node; controlling a second difference voltage across a second resistor array such that the second difference voltage is substantially the same as the first difference voltage; sensing a current flow in the second resistor array; adjusting the first and second control signals in response to the sensed current flow; and adjusting the plurality of stable reference voltages in response to the first and second control signals.
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Specification