Image sensor reading during reset and reading on release from reset

• US 7,280,140 B2
• Filed: 04/01/2003
• Issued: 10/09/2007
• Est. Priority Date: 04/02/2002
• Status: Active Grant

• Current Assignee: STMicroelectronics Limited (STMicroelectronics NV)
• Original Assignee: STMicroelectronics Limited (STMicroelectronics NV)
• Inventors: Henderson, Robert
• Primary Examiner(s): Srivastava; Vivek
• Assistant Examiner(s): Giles; Nicholas G
• Application Number:
  US10/405,101
• Publication Number:
  US 20030227040A1
• Time in Patent Office: 1,652 Days
• Field of Search: 348/241, 348/308, 348/243
• US Class Current: 348/241
• CPC Class Codes: H04N 25/616 involving a correlated sampling function, e.g. correlated double sampling [CDS] or triple sampling
• CPC Class Codes: H04N 25/65 applied to reset noise, e.g. KTC noise related to CMOS structures by techniques other than CDS
• CPC Class Codes: H04N 25/76 Addressed sensors, e.g. MOS or CMOS sensors

Abstract

A solid state image sensor has an array of pixels in which each column has a reset voltage line and a read line. The sensor is reset and read a row at a time, with reset-related values held in a frame buffer for subsequent subtraction from read values. Reset-related values are derived in each column by sampling the voltage during reset on one capacitor and the voltage on release of reset on a second capacitor, and differencing these values to provide an output for the frame buffer. This provides a reduction in the size of frame buffer which would otherwise be required.

Claims

1. A method of operating an image sensor, the image sensor having an array of pixels arranged in rows and columns, each pixel having a source-follower transistor and a reset voltage line, the method comprising:

reading on reset a first sample value from the reset voltage line equal to a reset voltage less a gate-source voltage of the source-follower transistor, and reading on release from reset a second sample value equal to the first sample value less the sum of a charge injection voltage, a reset coupling voltage, and a thermal noise voltage, the first and second sample values corresponding to a first set of pixel values and being read onto respective sample capacitors from the pixels row-by-row;

differencing the first set of pixel values to create reset-related values which are equal to the sum of the charge injection voltage, the reset coupling voltage, and the thermal noise voltage, and storing the reset-related values in a frame buffer;

reading after exposure a third sample value equal to the second sample value less an exposure induced voltage change, and reading during reset a fourth sample value equal to the first sample value, the third and fourth sample values corresponding to a second set of pixel values and being read onto respective sample capacitors from the pixels row-by-row, interleaved with the reading of the first set of pixel values, and differencing the second set of pixel values to create signal related values which are equal to the sum of the charge injection voltage, the reset coupling voltage, the thermal noise voltage, and the exposure induced voltage change;

the reading of said first and second sets of pixel values for a given row being offset by a number of row periods selected to control exposure of the image sensor; and

subtracting the respective reset-related value for each pixel from the respective signal-related value of each pixel to provide the exposure induced voltage change as an output signal for the pixel.

2. The method of claim 1, wherein the differencing comprises reducing an effect of the gate-source voltage from the stored pixel values.

3. The method of claim 1, further comprising subtracting a DC offset voltage from a black reference voltage during sampling.

4. A method of operating an image sensor, the image sensor having an array of pixels arranged in rows and columns, each pixel having a source-follower transistor and a reset voltage line, the method comprising:

reading during reset a first sample value from the reset voltage line equal to a reset voltage less a gate-source voltage of the source-follower transistor, and reading on release from reset a second sample value equal to the first sample value less the sum of a charge injection voltage, a reset coupling voltage, and a thermal noise voltage, the first and second sample values corresponding to a first set of pixel values and being read onto respective sample capacitors;

differencing the first set of pixel values to generate reset-related values which are equal to the sum of the charge injection voltage, the reset coupling voltage, and the thermal noise voltage; and

storing the reset-related values in a frame buffer.

5. The method of claim 4, further comprising:

reading after exposure a third sample value equal to the second sample value less an exposure induced voltage change, reading during reset a fourth sample value equal to the first sample value, the third and fourth sample values corresponding to a second set of pixel values and being read onto respective sample capacitors;

differencing the second set of pixel values to generate read values which are equal to the sum of the charge injection voltage, the reset coupling voltage, the thermal noise voltage, and the exposure induced voltage change; and

subtracting the respective reset-related value for each pixel from the respective read value of each pixel to provide the exposure induced voltage change as an output signal for the pixel.

6. The method of claim 4, wherein the differencing comprises reducing an effect of a the gate source voltage from the stored pixel values.

7. The method of claim 4, further comprising subtracting a DC offset voltage from a black reference voltage during sampling.

8. An image sensor comprising:

an array of pixels arranged in rows and columns, each pixel comprising a photosensitive element, a source-follower transistor coupled to the photosensitive element, and switching means for applying a reset voltage to the photosensitive element and for reading signal voltages therefrom;

a pair of sample capacitors;

reading means for reading a first sample value equal to the reset voltage less a gate-source voltage of the source-follower transistor, and a second sample value equal to the first sample value less the sum of a charge injection voltage, a reset coupling voltage, and a thermal noise voltage, during reset and release from reset, respectively, the first and second sample values corresponding to a first set of pixel values and being read onto respective sample capacitors;

a frame buffer; and

a difference circuit to difference the first set of pixel values to create a reset-related value, and to output to the frame buffer, the reset-related value for each pixel.

9. An image sensor according to claim 8, wherein the reading means reads a third sample value equal to the second sample value less an exposure induced voltage change and a fourth sample value equal to the first sample value, during reset and after exposure, respectively, the third and fourth sample values corresponding to a second set of pixel values and being read onto respective sample capacitors, and the second set of pixel values are differenced by the difference circuit to generate a signal-related value for each pixel which is equal to the sum of the charge injection voltage, the reset coupling voltage, the thermal noise voltage, and the exposure induced voltage change;

and further comprising subtracting means for subtracting respective reset-related values in the frame buffer from respective signal-related values for each pixel.

10. An image sensor according to claim 8, further comprising a pair of switches, each column of the array of pixels including a readout line connectable by the pair of switches to the pair of sample capacitors;

and wherein the pair of sample capacitors defines an input to said difference circuit.

11. An image sensor according to claim 10, further comprising means for applying a DC offset voltage to one of said sample capacitors.

12. An image sensor according to claim 11, further comprising a ramp generator to apply a ramp voltage to the other sample capacitor.

13. An image sensor comprising:

an array of pixels arranged in rows and columns, each pixel comprising a photosensitive element, a source-follower transistor coupled to the photosensitive element, and a switching circuit to apply a reset voltage to the photosensitive element and to read signal voltages therefrom;

a pair of sample capacitors;

a read circuit to read a first sample value equal to a reset voltage less a gate-source voltage of the source-follower transistor, and a second sample value equal to the first sample value less the sum of a charge injection voltage, a reset coupling voltage, and a thermal noise voltage, during reset and release from reset, respectively, the first and second sample values corresponding to a first set of pixel values and being read onto respective sample capacitors;

a frame buffer; and

a difference circuit to difference the first set of pixel values to create and output reset-related values for each pixel to the frame buffer.

14. An image sensor according to claim 13, wherein the read circuit also reads a third sample value equal to the second sample value less an exposure induced voltage change and a fourth sample value equal to the first sample value, during reset and after exposure, respectively, the third and fourth sample values corresponding to a second set of pixel values and being read onto respective sample capacitors, and the second set of pixel values are differenced by the difference circuit to generate a signal-related value for each pixel which is equal to the sum of the charge injection voltage, the reset coupling voltage, the thermal noise voltage, and the exposure induced voltage change;

and further comprising a subtracting circuit for subtracting respective reset-related values in the frame buffer from respective signal-related values for each pixel.

15. An image sensor according to claim 13, further comprising a pair of switches, each column of the array of pixels including a readout line connectable by the pair of switches to the pair of sample capacitors;

wherein the pair of sample capacitors defines an input to said difference circuit.

16. An image sensor according to claim 15, further comprising a DC offset circuit to apply a DC offset voltage to one of said sample capacitors.

17. An image sensor according to claim 16, further comprising a ramp generator to apply a ramp voltage to the other sample capacitor.