Flash memory device and method of repairing defects and trimming voltages
First Claim
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1. A memory device comprising:
- a nonvolatile memory cell array including a plurality of memory cells, a portion of the memory cells to store fuse data; and
a fuse register to store the fuse data from the memory cell array;
wherein an operation of the memory device is modified in response to the fuse register.
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Abstract
A memory device includes a nonvolatile memory cell array including a plurality of memory cells with a portion of the memory cells to store fuse data, and a fuse register to store the fuse data from the memory cell array. An operation of the memory device is modified in response to the fuse register.
96 Citations
24 Claims
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1. A memory device comprising:
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a nonvolatile memory cell array including a plurality of memory cells, a portion of the memory cells to store fuse data; and a fuse register to store the fuse data from the memory cell array; wherein an operation of the memory device is modified in response to the fuse register. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9)
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10. A method for configuring a memory device, comprising:
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reading fuse data from a memory cell array; storing the fuse data in a fuse register; and mapping an address associated with a defective memory cell to an address associated with a redundant memory cell in response to the fuse data stored in the fuse register. - View Dependent Claims (11, 12, 13, 14, 15, 16, 17, 18, 19, 20)
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21. A method for configuring a memory device, comprising:
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reading fuse data from a memory cell array; storing the fuse data in a fuse register; and trimming an internal voltage in response to the fuse data stored in the fuse register. - View Dependent Claims (22, 23, 24)
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Specification