Method and system for sample and reconstruction synchronization for digital transmission of analog modem signal

• US 7,280,593 B2
• Filed: 09/26/2006
• Issued: 10/09/2007
• Est. Priority Date: 07/02/2001
• Status: Expired due to Fees

• Current Assignee: Low Environ AG LLC (Intellectual Ventures LLC)
• Original Assignee: Phonex Broadband
• Inventors: Hoobler, Ryan
• Primary Examiner(s): Fan, Chieh M.
• Assistant Examiner(s): PUENTE, EVA YI ZHENG
• Application Number:
  US11/535,393
• Publication Number:
  US 20070018859A1
• Time in Patent Office: 378 Days
• Field of Search: 375/222, 375/141, 375/251, 375/216, 375/377, 370/280, 370/296, 370/521
• US Class Current: 375/222
• CPC Class Codes: H04L 7/0008 Synchronisation information channels, e.g. clock distribution lines
• CPC Class Codes: H04L 7/044 using a single bit, e.g. start stop bit

Abstract

A method and system for the synchronization of the transmission of digitally converted analog modem signals between two or more modems using either RF over-the-air or A/C power line communication channels. This invention provides for modem speed optimization by minimizing or eliminating clock variance between the modems in a digital communication system. A fixed delay is created and maintained during modem operation. This invention is also adapted to function in a full-duplex communication system maintaining a fixed delay in both directions.

Claims

1. A method of synchronizing a reconstruction of analog modem signals at a remote bridging device, comprising the steps of:

receiving, at a first bridging device, a first analog signal;

generating, at said first bridging device, by a first analog-to-digital converter, a first digital data signal from said first analog signal, wherein;

said first analog-to-digital converter is synchronized by a first sample clock signal; and

,

said first digital data signal comprises a first sample synchronization signal and first digital information bits, said first sample synchronization signal comprising a digital marker representing sample timing information;

transmitting, from said first bridging device, said first digital data signal;

receiving, at a second bridging device, said first digital data signal from said first bridging device via a transmission medium;

detecting said first sample synchronization signal by said second bridging device;

generating, at said second bridging device, a first reconstruction clock signal based on said first sample synchronization signal;

converting, at said second bridging device, by a second digital-to-analog converter, said first digital data signal to a reconstruction of said first analog signal, wherein said second digital-to-analog converter is synchronized by said first reconstruction clock signal;

receiving, at said second bridging device, a second analog signal;

converting, at said second bridging device, by a second analog-to-digital converter, said second analog signal to a second digital data signal, wherein said second analog-to-digital converter is synchronized by said first reconstruction clock signal;

transmitting, from said second bridging device, said second digital data signal via said transmission medium;

receiving, at said first bridging device, said second digital data signal; and

,

converting, at said first bridging device, by a first digital-to-analog converter, said first digital data signal to a reconstruction of said second analog signal, wherein said first digital-to-analog converter is synchronized by said first sample clock signal.

2. The method of claim 1, wherein said transmission medium is an A/C power line.

3. The method of claim 1, wherein said transmission medium is an over the air RF signal.

4. A system for transmitting, between electronic bridging devices, synchronized digital signals from a plurality of analog signals and for reconstructing said plurality of analog signals, said system comprising:

a first bridging device that is configured to receive a first analog signal, and a second bridging device that is configured to receive a second analog signal, wherein said first bridging device is configured to output a reconstruction of said second analog signal, and wherein said second bridging device is configured to output a reconstruction of said first analog signal;

wherein said first bridging device comprises;

a first analog-to-digital converter configured to receive said first analog signal and generate a first digital signal from said first analog signal;

a first digital-to-analog converter configured to receive a second digital signal and to reconstruct said second analog signal;

a framing circuit, capable of sampling said first digital signal, generating a digital marker and transmitting a first sampled digital signal containing said digital marker to said first digital-to-analog converter and to said second bridging device, wherein said digital marker represents a synchronizing sample of said first digital signal; and

,

a first transceiver, wherein;

said first transceiver is configured to receive said first sampled digital signal from said framing circuit and to transmit said first sampled digital signal to said second bridging device; and

,

said first transceiver is configured to receive said second digital signal from said second bridging device and is configured to transmit said second digital signal to a first formatting circuit, wherein said first formatting circuit is configured to format said second digital signal received from said first transceiver and is configured to transmit said second digital signal to said first digital-to-analog converter, and wherein said digital marker enables synchronization of said second digital signal between said first digital-to-analog converter and said first transceiver; and

,

wherein said second bridging device comprises a second transceiver, a second digital-to-analog converter, a synchronizing circuit, a second analog-to-digital converter, and a second formatting circuit;

wherein said second transceiver is configured to receive said first sampled digital signal from said first bridging device and is configured to transmit said first sampled digital signal to said synchronizing circuit;

wherein said second transceiver is configured to receive said second digital signal from said second formatting circuit and configured to transmit said second digital signal to said first bridging device;

wherein said synchronizing circuit is configured to receive said first sampled digital signal and synchronize said first sampled digital signal, and wherein said digital marker enables synchronization of said first sampled digital signal between said second transceiver and said second digital-to-analog converter;

wherein said second digital-to-analog converter is configured to receive said first sampled digital signal and capable of reconstructing said first analog signal from said first sampled digital signal;

wherein said second analog-to-digital converter is configured to receive said second analog signal and generate a second digital signal from said second analog signal; and

wherein said second formatting circuit is configured to receive said second digital signal from said second analog-to-digital converter and to format said second digital signal for transmission to said first bridging device.

5. The system of claim 4, wherein said first transceiver is an A/C Power Line Carrier.

6. The system of claim 4, wherein said first transceiver is an RF transceiver.

7. The system of claim 4, wherein said second transceiver is an A/C Power Line Carrier.

8. The system of claim 4, wherein said second transceiver is an RF transceiver.

9. The system of claim 4, wherein said synchronizing circuit uses a start bit or a synchronizing pulse to time align sampled signals in order to establish the constant delay required for high speed bridging devices.

10. The system of claim 4, wherein said first bridging device filters said reconstructed second analog signal.

11. The system of claim 4, wherein said second bridging device filters said reconstructed first analog signal.

12. A system for reconstructing analog signals by synchronizing transmitted digital signals, said system comprising a first bridging device and a second bridging device, wherein:

said first bridging device is configured to receive a first analog signal and transmit a first digital signal;

said second bridging device is configured to receive said first digital signal from said first bridging device, output a reconstruction of said first analog signal, receive a second analog signal, and transmit a second digital signal; and

said first bridging device is configured to receive said second digital signal from said second bridging device, and output a reconstruction of said second analog signal;

wherein said first bridging device further comprises a first analog-to-digital converter, a framing circuit, a first transceiver, a first formatting circuit and a first digital-to-analog converter, wherein;

said first analog-to-digital converter is configured to receive said first analog signal and to generate said first digital signal;

said framing circuit is configured to sample said first digital signal and to transmit a digital marker to both said first digital-to-analog converter and to said second bridging device, wherein;

said digital marker represents a synchronizing sample of said first digital signal; and

,

said digital marker enables synchronization of said second digital signal between said second bridging device and first digital-to-analog converter;

said first transceiver is configured to transmit said first sampled digital signal to said second bridging device and to receive said second digital signal from said second bridging device;

said first formatting circuit is configured to format said second digital signal received from said second transceiver; and

said first digital-to-analog converter is configured to receive said formatted second digital signal and to generate said reconstructed second analog signal;

wherein said second bridging device further comprises a second transceiver, a synchronizing circuit, a second digital-to-analog converter, a second analog-to-digital converter, and a second formatting circuit, wherein;

said second transceiver is configured to receive said first sampled digital signal from said first bridging device and to transmit said second digital signal to said first bridging device;

said synchronizing circuit is configured to receive said first sampled digital signal from said second transceiver, and is configured to synchronize said first sampled digital signal, wherein;

said digital marker enables synchronization of said first sampled digital signal between said second transceiver and said second digital-to-analog converter;

said second digital-to-analog converter is configured to receive said time-aligned first sampled digital signal and to generate said reconstructed first analog signal;

said second analog-to-digital converter is configured to receive said second analog signal and to generate said second digital signal;

said second formatting circuit is configured to format said second digital signal for transmission to said first bridging device via said second transceiver.

13. The system of claim 12, wherein said first transceiver is an A/C Power Line Carrier.

14. The system of claim 12, wherein said first transceiver is an RF transceiver.

15. The system of claim 12, wherein said second transceiver is an A/C Power Line Carrier.

16. The system of claim 12, wherein said second transceiver is an RF transceiver.

17. The system of claim 12, wherein said digital marker indicates the initiation of a clock signal for the respective synchronization of said first sampled digital signal and said second digital signal with said clock signal.

18. The system of claim 12, wherein said digital marker is used to respectively time-align said first sampled digital signal and said second digital signal with said clock signal.

19. The system of claim 12, wherein said first bridging device filters said reconstructed second analog signal.

20. The system of claim 12, wherein said second bridging device filters said reconstructed first analog signal.