Method and structure for implementing secure multichip modules for encryption applications

• US 7,281,667 B2
• Filed: 04/14/2005
• Issued: 10/16/2007
• Est. Priority Date: 04/14/2005
• Status: Expired due to Fees

• Current Assignee: International Business Machines Corporation
• Original Assignee: International Business Machines Corporation
• Inventors: Pompeo, Frank L., Fasano, Benjamin V., Ray, Sudipta K., Farooq, Mukta G., Long, David C., Hamel, Harvey C., Frankel, Jason L., Kadakia, Suresh D
• Primary Examiner(s): Stcyr; Daniel
• Application Number:
  US10/907,761
• Publication Number:
  US 20060231633A1
• Time in Patent Office: 915 Days
• Field of Search: 235/492, 235/487, 235/494
• US Class Current: 235/492
• CPC Class Codes: G06K 19/07381 with deactivation or otherwise incapacitation of at least a part of the circuit upon detected tampering
• CPC Class Codes: H01L 2224/16225 the item being non-metallic, e.g. insulating substrate with or without metallisation
• CPC Class Codes: H01L 2224/16227 the bump connector connecting to a bond pad of the item
• CPC Class Codes: H01L 23/04 characterised by the shape of the container or parts, e.g. caps, walls
• CPC Class Codes: H01L 23/055 the leads having a passage through the base H01L23/057 takes precedence
• CPC Class Codes: H01L 23/10 characterised by the material or arrangement of seals between parts, e.g. between cap and base of the container or between leads and walls of the container
• CPC Class Codes: H01L 23/576 using active circuits
• CPC Class Codes: H01L 25/0655 the devices being arranged next to each other
• CPC Class Codes: H01L 2924/01079 Gold [Au]
• CPC Class Codes: H01L 2924/09701 Low temperature co-fired ceramic [LTCC]
• CPC Class Codes: H01L 2924/15192 Resurf arrangement of the internal vias
• CPC Class Codes: H01L 2924/3011 Impedance
• CPC Class Codes: H05K 1/0275 Security details, e.g. tampering prevention or detection
• CPC Class Codes: H05K 1/0306 Inorganic insulating substrates, e.g. ceramic, glass
• CPC Class Codes: H05K 1/144 Stacked arrangements of planar printed circuit boards
• CPC Class Codes: H05K 2201/09263 Meander
• CPC Class Codes: H05K 2201/10151 Sensor

Abstract

A tamper resistant, integrated circuit (IC) module includes a ceramic-based chip carrier, one or more integrated circuit chips attached to the chip carrier, and a cap structure attached to the chip carrier, covering the one or more integrated circuit chips. A conductive grid structure is formed in the chip carrier and cap structure, the conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction. The conductive grid structure is configured so as to detect an attempt to penetrate the IC module.

Claims

1. A tamper resistant, integrated circuit (IC) module, comprising:

a ceramic-based chip carrier;

one or more integrated circuit chips attached to said chip carrier;

a cap structure attached to said chip carrier, and covering said one or more integrated circuit chips; and

a conductive grid structure formed in said chip carrier and said cap structure, said conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured so as to detect an attempt to penetrate the IC module;

wherein meandering lines formed on one wiring level of said chip carrier are disposed in an offset arrangement with respect to meandering lines formed on an adjacent wiring level of said chip carrier; and

wherein said plurality of meandering lines in said x-direction and said y-direction are formed at a selected linewidth and pitch therebetween, such that said offset arrangement results in an effective pitch in said z-direction equal to or less than said selected linewidth.

2. A tamper resistant, integrated circuit (IC) module, comprising:

a ceramic-based chip carrier;

one or more integrated circuit chips attached to said chip carrier;

a cap structure attached to said chip carrier, and covering said one or more integrated circuit chips; and

a conductive grid structure formed in said chip carrier and said cap structure, said conductive structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured so as to detect an attempt to penetrate the IC module; and

wherein said meandering lines in said z-direction further comprise jogs formed on one level of said chip carrier coupled to jogs formed on another level of said chip carrier through conductively filled vias.

3. A tamper resistant, integrated circuit (IC) module, comprising:

a ceramic-based chip carrier;

one or more integrated circuit chips attached to said chip carrier;

a ceramic-based cap structure attached to said chip carrier, said cap structure including a top portion and a footing integrated thereon, said footing surrounding said one or more IC chips attached to said chip carrier; and

a conductive grid structure formed in said chip carrier and said cap structure, said conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured so as to detect an attempt to penetrate the IC module;

wherein meandering lines formed on one wiring level of said chip carrier are disposed in an offset arrangement with respect to meandering lines formed on an adjacent wiring level of said chip carrier; and

wherein said plurality of meandering lines in said x-direction and said y-direction are formed at a selected linewidth and pitch therebetween, such that said offset arrangement results in an effective pitch in said z-direction equal to or less than said selected linewidth.

4. A tamper resistant, integrated circuit (IC) module, comprising:

a ceramic-based chip carrier;

one or more integrated circuit chips attached to said chip carrier;

a ceramic-based cap structure attached to said chip carrier, said cap structure including a top portion and a footing integrated thereon, said footing surrounding said one or more IC chips attached to said chip carrier; and

a conductive grid structure formed in said chip carrier and said cap structure, said conductive grid structure having a plurality of meandering lines disposed in an x-direction, a y-direction, and a z-direction;

wherein said conductive grid structure is configured so as to detect an attempt to penetrate the IC module; and

wherein said meandering lines in said z-direction further comprise jogs formed on one level of said chip carrier coupled to jogs formed on another level of said chip carrier through conductively filled vias.