Nonvolatile memory system, semiconductor memory, and writing method

• US 7,283,399 B2
• Filed: 08/03/2006
• Issued: 10/16/2007
• Est. Priority Date: 07/09/1996
• Status: Expired due to Fees

• Current Assignee: Renesas Electronics Corporation
• Original Assignee: Renesas Technology Corporation (Renesas Electronics Corporation)
• Inventors: Ishii, Tatsuya, Tsuchiya, Osamu, Miwa, Hitoshi, Kubono, Shooji
• Primary Examiner(s): Phung; Anh
• Assistant Examiner(s): Nguyen; Hien N
• Application Number:
  US11/498,230
• Publication Number:
  US 20060268610A1
• Time in Patent Office: 439 Days
• Field of Search: 365/185.24, 365/185.02, 365/185.29, 365/185.18, 365/185.22, 365/185.33
• US Class Current: 365/185.24
• CPC Class Codes: G11C 16/0491 Virtual ground arrays
• CPC Class Codes: G11C 16/10 Programming or data input circuits
• CPC Class Codes: G11C 16/12 Programming voltage switching circuits
• CPC Class Codes: G11C 16/16 for erasing blocks, e.g. arrays, words, groups
• CPC Class Codes: G11C 16/3404 Convergence or correction of memory cell threshold voltages; Repair or recovery of overerased or overprogrammed cells
• CPC Class Codes: G11C 16/3427 Circuits or methods to prevent or reduce disturbance of the state of a memory cell when neighbouring cells are read or written
• CPC Class Codes: G11C 16/3431 Circuits or methods to detect disturbed nonvolatile memory cells, e.g. which still read as programmed but with threshold less than the program verify threshold or read as erased but with threshold greater than the erase verify threshold, and to reverse the disturbance via a refreshing programming or erasing step
• CPC Class Codes: G11C 16/3459 Circuits or methods to verify correct programming of nonvolatile memory cells
• CPC Class Codes: G11C 2216/18 Flash erasure of all the cells in an array, sector or block simultaneously

Abstract

A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.

Claims

1. A semiconductor storage apparatus comprising:

a nonvolatile memory having a plurality of word lines, each of which is coupled with memory cells;

a controller; and

terminals,

wherein the controller is capable of receiving a command from outside of the semiconductor storage apparatus via the terminals, and is capable of access controlling to the nonvolatile memory in response to the command,

wherein the controller is capable of issuing a program command to the nonvolatile memory accompanied with first write address information and first data for making the nonvolatile memory store the first data to first group memory cells coupled to a first word line,

wherein when the controller receives a write command as the command accompanied with first address information and second data having 512 byte length, the controller issues the program command to the nonvolatile memory accompanied with second write address information and the second data; and

the nonvolatile memory, in response to the program command accompanied with the second write address information issued from the controller, selects the first word line in accordance with the second write address information and stores the second data to second group memory cells coupled to the first word line, after issuing the program command from the controller for storing the first data to the first group memory cells without issuing an access command from the controller to the nonvolatile memory for erasing data stored in the first group memory cells coupled to the first word line.

2. A semiconductor storage apparatus according to claim 1,

wherein the nonvolatile memory has a buffer memory for storing the first data temporarily.

3. A semiconductor storage apparatus according to claim 2,

wherein the nonvolatile memory has an address decoder for decoding the first address information to select the first word line and the second address information to select the first word line.

4. A semiconductor storage apparatus according to claim 3,

wherein the nonvolatile memory further has a control circuit for controlling a program operation for storing the first data to the first group memory cells and the second data to the second group memory cells.

5. A semiconductor storage apparatus according to claim 1,

wherein said semiconductor storage apparatus is a memory card and said nonvolatile memory is a flash memory.

6. A semiconductor storage apparatus according to claim 1,

wherein each of the memory cells has a floating gate and a control gate,

wherein in programming and erasing data, FN (Fowler-Nordheim) tunnel injection and emission are employed for injecting electrons into the floating gate and drawing electrons from the floating gate.

7. A semiconductor memory card comprising:

a card substrate;

a flash memory mounted over the card substrate and having a plurality of word lines, each of which is coupled with memory cells;

a controller mounted over the card substrate; and

terminals provided along one side of the card substrate;

wherein the controller is capable of receiving a command from outside of the semiconductor memory card via the terminals, and is capable of access controlling to the flash memory in response to the command,

wherein the controller is capable of issuing a program command to the flash memory accompanied with first write address information and first data for making the flash memory store the first data to first group memory cells coupled to a first word line, and

wherein the flash memory is capable of continuously storing second data having 512 byte length to second group memory cells coupled to the first word line without an intervening erase operation for the first data stored in the first group memory cells coupled to the first word line.

8. A semiconductor memory card according to claim 7,

wherein the nonvolatile memory has a buffer memory for storing the first data temporarily.

9. A semiconductor memory card according to claim 8,

wherein the nonvolatile memory has an address decoder for decoding the first address information to select the first word line and the second address information to select the first word line.

10. A semiconductor memory card according to claim 9,

wherein the nonvolatile memory further has a control circuit for controlling a program operation for storing the first data to the first group memory cells and the second data to the second group memory cells.

11. A semiconductor memory card according to claim 7,

wherein said nonvolatile memory is a flash memory.

12. A semiconductor memory card according to claim 7,

wherein each of the memory cells has a floating gate and a control gate,

wherein in programming and erasing data, EN (Fowler-Nordheim) tunnel injection and emission are employed for injecting electrons into the floating gate and drawing electrons from the floating gate.

13. A semiconductor memory card comprising:

a card substrate;

a flash memory mounted over the card substrate and having a plurality of word lines, each of which is coupled with memory cells;

a controller mounted over the card substrate; and

terminals provided along one side of the card substrate;

wherein the controller is capable of receiving a command from outside of the semiconductor memory card via the terminals, and is capable of access controlling to the flash memory in response to the command,

wherein the controller is capable of issuing a program command to the flash memory accompanied with first write address information and first data for making the flash memory store the first data to first group memory cells coupled to a first word line,

wherein the flash memory is capable of storing second data having 512 byte length to second group memory cells coupled to the first word line without an intervening erase operation for the first data stored in the first group memory cells coupled to the first word line, after storing the first data to the first group memory cells corresponding to the program command from the controller.

14. A semiconductor memory card according to claim 13,

wherein the nonvolatile memory has a buffer memory for storing the first data temporarily.

15. A semiconductor memory card according to claim 14,

wherein the nonvolatile memory has an address decoder for decoding the first address information to select the first word line and the second address information to select the first word line.

16. A semiconductor memory card according to claim 15,

wherein the nonvolatile memory further has a control circuit for controlling a program operation for storing the first data to the first group memory cells and the second data to the second group memory cells.

17. A semiconductor memory card according to claim 13,

wherein said nonvolatile memory is a flash memory.

18. A semiconductor memory card according to claim 13,

wherein each of the memory cells has a floating gate and a control gate, wherein in programming and erasing data, FN (Fowler-Nordheim) tunnel injection and emission are employed for injecting electrons into the floating gate and drawing electrons from the floating gate.