×

Memory device and method for simultaneously programming and/or reading memory cells on different levels

  • US 7,283,403 B2
  • Filed: 11/12/2004
  • Issued: 10/16/2007
  • Est. Priority Date: 11/16/1998
  • Status: Expired due to Fees
First Claim
Patent Images

1. A memory device comprising:

  • a three-dimensional memory array comprising;

    a first level of memory cells;

    a second level of memory cells; and

    a plurality of conductor layers comprising first, second, and third conductor layers, wherein the first level of memory cells is between the first and second conductor layers, and wherein the second level of memory cells is between the second and third conductor layers; and

    circuitry operative to simultaneously program at least two memory cells, at least one in the first level and at least one in the second level.

View all claims
  • 5 Assignments
Timeline View
Assignment View
    ×
    ×