Method for manufacturing a GaN based LED of a black hole structure

• US 7,285,431 B2
• Filed: 06/27/2005
• Issued: 10/23/2007
• Est. Priority Date: 09/30/2004
• Status: Active Grant

• Current Assignee: Institute of Semiconductors, Chinese Academy of Sciences (Chinese Academy of Sciences)
• Original Assignee: Institute of Semiconductors, Chinese Academy of Sciences (Chinese Academy of Sciences)
• Inventors: Li, Jinmin, Wang, Guohong, Wang, Liangchen, Ma, Long, Fan, Zhongchao
• Primary Examiner(s): Lebentritt; Michael
• Assistant Examiner(s): MUSTAPHA, ABDULFATTAH B
• Application Number:
  US11/167,242
• Publication Number:
  US 20060068515A1
• Time in Patent Office: 848 Days
• Field of Search: 438/21, 438/22, 438/41, 438/44, 438/107, 257/88, 257/103, 977/759
• US Class Current: 438/22
• CPC Class Codes: H01L 2224/0554 External layer
• CPC Class Codes: H01L 2224/0555 Shape
• CPC Class Codes: H01L 2224/0556 Disposition
• CPC Class Codes: H01L 2224/05568 the whole external layer protruding from the surface
• CPC Class Codes: H01L 2224/05573 Single external layer
• CPC Class Codes: H01L 2224/05599 Material
• CPC Class Codes: H01L 2224/05624 Aluminium [Al] as principal constituent
• CPC Class Codes: H01L 2224/05644 Gold [Au] as principal constituent
• CPC Class Codes: H01L 2224/05647 Copper [Cu] as principal constituent
• CPC Class Codes: H01L 2224/05655 Nickel [Ni] as principal constituent
• CPC Class Codes: H01L 2224/05666 Titanium [Ti] as principal constituent
• CPC Class Codes: H01L 2224/05671 Chromium [Cr] as principal constituent
• CPC Class Codes: H01L 2224/13025 the bump connector being disposed on a via connection of the semiconductor or solid-state body
• CPC Class Codes: H01L 2224/16 of an individual bump connector
• CPC Class Codes: H01L 24/17 of a plurality of bump connectors
• CPC Class Codes: H01L 2924/00 Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
• CPC Class Codes: H01L 2924/00014 the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
• CPC Class Codes: H01L 2924/01019 Potassium [K]
• CPC Class Codes: H01L 2924/01029 Copper [Cu]
• CPC Class Codes: H01L 2924/01078 Platinum [Pt]
• CPC Class Codes: H01L 2924/01079 : Gold [Au]
• CPC Class Codes: H01L 2924/10253 : Silicon [Si]
• CPC Class Codes: H01L 2924/12041 : LED
• CPC Class Codes: H01L 2933/0075 : relating to heat extraction or cooling elements
• CPC Class Codes: H01L 33/0093 : Wafer bonding; Removal of the growth substrate
• CPC Class Codes: H01L 33/62 : Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
• CPC Class Codes: H01L 33/64 : Heat extraction or cooling elements
• CPC Class Codes: Y10S 977/759 : Quantum well dimensioned for intersubband transitions, e.g. for use in unipolar light emitters or quantum well infrared photodetectors

Abstract

This invention relates to a method for manufacturing a GaN based LED of a back hole structure, and the method comprises: epitaxially growing an N type GaN layer, a multi-quantum wells emitting active region and a P type GaN layer in turn on an insulation substrate made of sapphire or other materials; etching the N type GaN layer by photoetching, and forming a P type ohmic contact electrode and an N type ohmic contact electrode; scribing the chip to divide the dies on the epitaxial chip into individual die; forming a SiO₂ insulation isolation layer on both sides of the silicon chip, forming a metal electrode on a face side, and forming a back hole pattern on a back side; forming a back hole; forming a bump pattern for plating on the face side of the silicon chip by thick resist photoetching; forming a layer of alloy with low melting point on the back side of the silicon chip, thus forming a base; on the back side of the base, directly attaching the base to a heat sink of a housing; bonding the die with the face side of the base through the metal bumps, leading an N electrode of the LED from the metal electrode formed on the face surface of the silicon chip, and leading a P electrode of the LED from the back side of the heat sink of the housing.

Claims

1. A method for manufacturing a gallium nitride based lighting emitting diode of a back hole structure comprising steps of:

Step 1;

epitaxially growing an N type gallium nitride (GaN) layer, a multi-quantum wells emitting active region and a P type gallium nitride layer in turn on an insulation substrate made of sapphire or other materials by a metal organic chemical vapor deposition (MOCVD) method;

Step 2;

etching a designed chip pattern into the N type GaN layer by photoetching, and forming a P type ohmic contact electrode and an N type ohmic contact electrode on the P type GaN layer and N type GaN layer, respectively;

Step 3;

thinning the sapphire substrate from its back side by a milling method or an ion thinning technique;

Step 4;

scribing the chip to divide the dies on the epitaxial chip into individual die;

Step 5;

forming a SiO₂ insulation isolation layer on both sides of the silicon chip by a thermal oxidation method, forming a metal electrode on a face side by evaporation or sputtering, and forming a back hole pattern on a back side by photoetching, then corroding the SiO₂;

Step 6;

etching or corroding the silicon chip on the back side by ICP dry etching or KOH as anisotropic corrosion solution of silicon, until the SiO₂ insulation isolation layer on the face side being exposed;

continuing the corrosion by HF as corrosion solution of silicon oxide, until the metal electrode being exposed, thus forming a back hole;

Step 7;

plating copper with high heat conductivity in the back hole until the surface thereof and the surface of the back side of the silicon chip are in a plane;

Step 8;

forming an electrode connected to the N electrode of the die by photoetching on the face side of the silicon chip;

Step 9;

forming a bump pattern for plating on the face side of the silicon chip by thick resist photoetching, selectively plating metal bumps respectively connected to the P type ohmic contact electrode and the N type ohmic contact electrode of the die;

Step 10;

forming a layer of alloy with low melting point on the back side of the silicon chip, thus forming a base;

Step 11;

directly attaching the base to a heat sink of a housing by heating the alloy on the back side of the base;

Step 12;

bonding the die with the face side of the base through the metal bumps by a flip-chip bonder, leading an N electrode of the LED from the metal electrode formed on the face surface of the silicon chip, and leading a P electrode of the LED from the back side of the heat sink of the housing.

2. The method according to claim 1, wherein the substrate is thinned to a thickness of 80 m-120 m.

3. The method according to claim 1, wherein the number of the back holes is one or more, and the material filled in the back hole(s) is copper.

4. The method according to claim 1, wherein the metal electrode is made of aluminum, chromium, nickel, gold, titanium.

5. The method according to claim 1, wherein the size of the die is 1 mm*1 mm.