Flash memory device using semiconductor fin and method thereof
First Claim
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1. A flash memory device comprising:
- a semiconductor fin including a top surface and a side surface originated from different crystal planes;
a first insulating layer formed on the side surface and a second insulating layer formed on the top surface;
a storage layer formed on the first insulating layer and the second insulating layer;
a gate insulating layer formed on the storage layer; and
a control gate electrode formed on the gate insulating layer.
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Abstract
A flash memory device according to the present invention includes a semiconductor fin including a top surface and a side surface originated from different crystal planes. The flash memory device comprises: insulating layers having different thicknesses formed on a side surface and a top surface of the semiconductor fin, a storage electrode, a gate insulating layer and a control gate electrode sequentially formed on the insulating layers. A thin insulating layer enables charges to be injected or emitted through it, and a thick insulating layer increases a coupling ratio. Accordingly, it is possible to increase an efficiency of a programming or an erase operation of a flash memory device.
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Citations
24 Claims
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1. A flash memory device comprising:
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a semiconductor fin including a top surface and a side surface originated from different crystal planes; a first insulating layer formed on the side surface and a second insulating layer formed on the top surface; a storage layer formed on the first insulating layer and the second insulating layer; a gate insulating layer formed on the storage layer; and a control gate electrode formed on the gate insulating layer. - View Dependent Claims (2, 3, 4, 5, 6, 7, 8, 9, 10, 11)
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12. A flash memory device comprising:
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a semiconductor fin including a top surface and a side surface originated from different crystal planes; a first thermal oxide layer and a second thermal oxide layer with different thicknesses formed on the side surface and the top surface; a floating gate electrode formed on the first thermal oxide layer and the second thermal oxide layer; a gate insulating layer formed on the floating gate electrode; and a control gate electrode formed on the gate insulating layer. - View Dependent Claims (13, 14, 15, 16, 17, 18, 19)
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20. A semiconductor device comprising:
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a first semiconductor fin including a top surface and a side surface of a different crystal plane; a second semiconductor fin including a top surface having the same crystal plane as the top surface of the first semiconductor fin and a side surface having the same or different crystal plane as the side surface of the first semiconductor fin; a first thermal oxide layer and a second thermal oxide layer formed on the top surface and the side surface of the first semiconductor fin, respectively; a floating gate electrode formed on the first thermal oxide layer and the second thermal oxide layer; a first gate insulating layer and a control gate electrode, which are sequentially formed on the floating gate electrode; a second gate insulating layer formed on the top surface and the side surface of the second semiconductor fin; and a gate electrode formed on the second gate insulating layer. - View Dependent Claims (21, 22, 23, 24)
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Specification