Method and apparatus for round trip delay measurement in a bi-directional, point-to-point, serial data channel
First Claim
1. A transceiver comprising:
- a receiver for receiving timing signals from a remote transceiver;
a first register for storing timing signal values received from said remote transceiver;
logic circuitry for comparing the value of a timing signal received from said remote transceiver to a timing signal value stored in said first register for storing timing signal values; and
,a transmitter for transmitting a timing signal received from said remote transceiver, when the value of the timing signal is the same as the timing signal value stored in said first register.
5 Assignments
0 Petitions
Accused Products
Abstract
The link round trip delay between two switches in a Fibre Channel network may be determined by sending a particular timing signal value from an originating switch to a responding switch. The responding switch may store the timing signal value in an “echo” register for comparison to subsequently received timing signals. The originating switch may then send the pre-selected timing signal to the responding switch while simultaneously starting a timer. When the responding switch receives the timing signal, it may compare the value of the received signal to that stored in its echo register. If the value, is the same, the responding switch may retransmit—i.e., echo—the timing signal to the originating switch. When the originating switch receives the echoed timing signal, it may stop its timer and compute the link round trip delay time. The computed link round trip delay time between the originating switch and the responding switch may be advantageously used in fabric routing algorithms.
7 Citations
37 Claims
-
1. A transceiver comprising:
-
a receiver for receiving timing signals from a remote transceiver; a first register for storing timing signal values received from said remote transceiver; logic circuitry for comparing the value of a timing signal received from said remote transceiver to a timing signal value stored in said first register for storing timing signal values; and
,a transmitter for transmitting a timing signal received from said remote transceiver, when the value of the timing signal is the same as the timing signal value stored in said first register. - View Dependent Claims (2)
-
-
3. A transceiver comprising:
-
a transmitter for sending a timing signal value to a remote transceiver for storage in said remote transceiver; a register for storing the timing signal value; a transmitter for transmitting a timing signal to said remote transceiver; a timer which starts when said transmitter transmits the timing signal and which can be stopped; a receiver for receiving timing signals from said remote transceiver; and
,a comparator coupled to said receiver and said timer for stopping said timer if the value of a received timing signal is the same as the timing signal value stored in said register. - View Dependent Claims (4, 5)
-
-
6. A Fibre Channel switch comprising:
-
a receiver for receiving timing primitive signals from a remote Fibre Channel switch; a first register for storing timing primitive signal values received from said remote Fibre Channel switch; logic circuitry for comparing the value of a timing primitive signal received from said remote Fibre Channel switch to a timing signal value stored in said first register for storing timing primitive signal values; and
,a transmitter for transmitting a timing primitive signal received from said remote Fibre Channel switch, when the value of the timing primitive signal is the same as the timing primitive signal value stored in said first register. - View Dependent Claims (7, 8)
-
-
9. A Fibre Channel switch comprising:
-
a transmitter for sending a timing primitive signal value to a remote Fibre Channel switch for storage in said remote Fibre Channel switch; a register for storing the timing primitive signal value; a transmitter for transmitting a timing primitive signal to said remote Fibre Channel switch; a timer which starts when said transmitter transmits the timing primitive signal and which can be stopped; a receiver for receiving timing primitive signals from said remote Fibre Channel switch; and
,a comparator coupled to said receiver and said timer for stopping said timer if the value of a received timing primitive signal is the same as the timing primitive signal value stored in said register. - View Dependent Claims (10)
-
-
11. A method for measuring a link round trip delay between two Fibre Channel switches comprising:
-
selecting a timing primitive signal value; storing the selected timing primitive signal value in a first register in a first switch; sending the selected timing primitive signal value to a second switch; storing the selected timing primitive signal value in a second register in said second switch; transmitting a timing primitive signal having the selected value from said first switch to said second switch; starting a timer when the said timing primitive signal is transmitted by said first switch; receiving a primitive signal in said second switch; comparing the value of the received primitive signal to the selected timing primitive signal value stored in said second register; transmitting the received primitive signal from said second switch to said first switch if said received primitive signal value is the same as the timing primitive signal value stored in said second register; receiving said primitive signal transmitted by said second switch in said first switch; comparing the value of said received primitive signal transmitted by said second switch to the selected timing primitive signal value in said first register; and
,stopping the timer if said received primitive signal value transmitted by said second switch is the same as the timing primitive signal value stored in said first register. - View Dependent Claims (12, 13, 14, 15, 16, 17, 18, 19, 20, 21)
-
-
22. An article of manufacture comprising a computer-readable medium having stored therein instructions which, when executed, cause a first processor-based system to perform the method of:
-
selecting a timing primitive signal value; storing the selected timing primitive signal value in a first register; sending said selected timing primitive signal value to a second processor-based system; transmitting a timing primitive signal having the selected value from said first processor-based system to said second processor-based system; starting a timer when the timing primitive signal having the selected value is transmitted by said first processor-based system; and
,computing the time elapsed from transmitting the timing primitive signal having the selected value to receiving the timing primitive signal from said second processor-based system. - View Dependent Claims (23, 24)
-
-
25. An article of manufacture comprising a computer-readable medium having stored therein instructions which, when executed, cause a first processor-based system to perform the method of:
-
storing a timing primitive signal value received from a second processor-based system in a register; and
,enabling, in response to a command from said second processor-based system, the transmission of a received timing primitive signal to said second processor-based system if the value of said received timing primitive signal has the same value as that stored in said register.
-
-
26. A processor-based system comprising:
-
a processor; and
,a computer-readable medium coupled to said processor and storing instructions which, when executed, cause said processor to perform the method of; selecting a timing primitive signal value; storing the selected timing primitive signal value in a first register; sending the selected timing primitive signal value to a second processor-based system; transmitting a timing primitive signal having the selected value from said first processor-based system to said second processor-based system; starting a timer when said timing primitive signal is transmitted by said first processor-based system; and
,computing the time elapsed from transmitting the timing primitive signal to receiving said timing primitive signal from said second processor-based system. - View Dependent Claims (27, 28)
-
-
29. A processor-based system comprising:
-
a processor; and
,a computer-readable medium coupled to said processor and storing instructions which, when executed, cause said processor to perform the steps of; storing a timing primitive signal value received from a second processor-based system in a register; and
,enabling, in response to a command from said second processor-based system, the transmission of a received timing primitive signal to said second processor-based system if said received timing primitive signal has the same value as the value stored in said register.
-
-
30. A Fibre Channel fabric comprising:
-
a first Fibre Channel switch; a second Fibre Channel switch; a link connecting said first and second switches; a receiver in said first Fibre Channel switch for receiving timing primitive signals from said second Fibre Channel switch; a first register in said first Fibre Channel switch for storing a timing primitive signal value to be received from said second Fibre Channel switch, a timing primitive signal value being at least a portion of a frame payload of a frame provided by said second Fibre Channel switch; and
,logic circuitry in said first Fibre Channel switch for comparing the value of a timing primitive signal received from said second Fibre Channel switch to the timing primitive signal value stored in said first register for storing timing primitive signals. - View Dependent Claims (31)
-
-
32. A Fibre Channel fabric comprising:
-
a first Fibre Channel switch; a second Fibre Channel switch; a link connecting said first and second Fibre Channel switches, wherein said first Fibre Channel switch includes; a receiver for receiving timing primitive signals from said second Fibre Channel switch; a first register for storing timing primitive signal values received from said second Fibre Channel switch; logic circuitry for comparing the value of a timing primitive signal received from said second Fibre Channel switch to a timing signal value stored in said first register for storing timing primitive signal values; and
,a transmitter for transmitting a timing primitive signal received from said second Fibre Channel switch, when the value of said timing primitive signal is the same as the timing primitive signal value stored in said first register, and wherein said second Fibre Channel switch includes; a transmitter for sending a timing primitive signal value to said first Fibre Channel switch for storage in said first register; a second register for storing the timing primitive signal value; a transmitter for transmitting a timing primitive signal to said first Fibre Channel switch; a timer which starts when said transmitter transmits the timing primitive signal and which can be stopped; a receiver for receiving timing primitive signals from said first Fibre Channel switch; and
,a comparator coupled to said receiver of said second Fibre Channel switch and said timer for stopping said timer if a received timing primitive signal has the same value as the timing primitive signal value stored in said second register.
-
-
33. A network comprising:
-
a first end node coupled to a first Fibre Channel switch; a second end node coupled to a second Fibre Channel switch; a link connecting said first and second Fibre Channel switches; a receiver in said first Fibre Channel switch for receiving timing primitive signal values from said second Fibre Channel switch; a first register in said first Fibre Channel switch for storing a timing primitive signal value to be received from said second Fibre Channel switch, a timing primitive signal value being at least a portion of a frame payload of a frame provided by said second Fibre Channel switch; and
,logic circuitry in said first Fibre Channel switch for comparing the value of a timing primitive signal received from said second Fibre Channel switch to the timing primitive signal value stored in said first register for storing timing primitive signal values. - View Dependent Claims (34, 35)
-
-
36. A network comprising:
-
a first end node; a first Fibre Channel switch coupled to said first end node; a second end node; a second Fibre Channel switch coupled to said second end node; and
,a link connecting said first and second Fibre Channel switches; wherein said first Fibre Channel switch includes; a receiver for receiving timing primitive signals from said second Fibre Channel switch; a first register for storing timing primitive signal values received from said second Fibre Channel switch; logic circuitry for comparing the value of a timing primitive signal received from said second Fibre Channel switch to a timing primitive signal value stored in said first register for storing timing primitive signal values; and
,a transmitter for transmitting a timing primitive signal received from said second Fibre Channel switch, when the value of the timing primitive signal is the same as the timing primitive signal value stored in said first register, and wherein said second Fibre Channel switch includes; a transmitter for sending a timing primitive signal value to said first Fibre Channel switch for storage in said first register; a second register for storing the timing primitive signal value; a transmitter for transmitting the timing primitive signal to said first Fibre Channel switch; a timer which starts when said transmitter transmits the timing primitive signal and which can be stopped; a receiver for receiving timing primitive signals from said first Fibre Channel switch; and
,a comparator coupled to said receiver of said second Fibre Channel switch and said timer for stopping said timer if the value of a received timing primitive signal is the same as the timing primitive signal value stored in said second register. - View Dependent Claims (37)
-
Specification